YuliangLiu0306 e859380bf7 [fx] support module with bias addition (#1780) ... * [autoparallel] refactor tracer to fix bias addition issue * [fx] support module with bias addition * create bias_addition_module * refactor file structure * polish code * fix unit test		2022-11-01 22:53:51 +08:00
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test_timm.py	[fx] support module with bias addition (#1780)	2022-11-01 22:53:51 +08:00
timm_utils.py	[fx]add split module pass and unit test from pipeline passes (#1242)	2022-07-12 13:45:01 +08:00