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https://github.com/projectacrn/acrn-hypervisor.git
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HV: treewide: give names to unnamed structs/unions
According to the syntax defined in C99, each struct/union field must have an identifier. This patch adds names to the previously unnamed fields for C99 compatibility. Here is a summary of the names (marked with a pair of *stars*) added. struct trusty_mem: union { struct { struct key_info key_info; struct trusty_startup_param startup_param; } *data*; uint8_t page[CPU_PAGE_SIZE]; } first_page; struct ptdev_remapping_info: union { struct ptdev_msi_info msi; struct ptdev_intx_info intx; } *ptdev_intr_info*; union code_segment_descriptor: uint64_t value; struct { union { ... } low32; union { ... } high32; } *fields*; similar changes are made to the following structures. * union data_segment_descriptor, * union system_segment_descriptor, * union tss_64_descriptor, and * union idt_64_descriptor struct trace_entry: union { struct { uint32_t a, b, c, d; } *fields_32*; struct { uint8_t a1, a2, a3, a4; uint8_t b1, b2, b3, b4; uint8_t c1, c2, c3, c4; uint8_t d1, d2, d3, d4; } *fields_8*; struct { uint64_t e; uint64_t f; } *fields_64*; char str[16]; } *payload*; Signed-off-by: Junjie Mao <junjie.mao@intel.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com>
This commit is contained in:
parent
ef3cb5ba1c
commit
004d2e2696
@ -77,10 +77,10 @@ entry_id(struct ptdev_remapping_info *entry)
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uint32_t id;
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if (entry->type == PTDEV_INTR_INTX)
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id = entry_id_from_intx(entry->intx.phys_pin);
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id = entry_id_from_intx(entry->ptdev_intr_info.intx.phys_pin);
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else
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id = entry_id_from_msix(entry->phys_bdf,
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entry->msi.msix_entry_index);
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entry->ptdev_intr_info.msi.msix_entry_index);
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return id;
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}
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@ -138,7 +138,8 @@ _lookup_entry_by_vmsi(struct vm *vm, uint16_t vbdf, int32_t index)
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if ((entry->type == PTDEV_INTR_MSI)
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&& (entry->vm == vm)
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&& (entry->virt_bdf == vbdf)
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&& (entry->msi.msix_entry_index == index))
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&& (entry->ptdev_intr_info.msi.msix_entry_index
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== index))
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return entry;
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}
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@ -169,8 +170,8 @@ _lookup_entry_by_vintx(struct vm *vm, uint8_t vpin,
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entry_node);
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if ((entry->type == PTDEV_INTR_INTX)
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&& (entry->vm == vm)
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&& (entry->intx.virt_pin == vpin)
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&& (entry->intx.vpin_src == vpin_src))
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&& (entry->ptdev_intr_info.intx.virt_pin == vpin)
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&& (entry->ptdev_intr_info.intx.vpin_src == vpin_src))
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return entry;
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}
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@ -299,12 +300,13 @@ ptdev_update_irq_handler(struct vm *vm, struct ptdev_remapping_info *entry)
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}
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/* update irq handler for IOAPIC */
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if ((entry->type == PTDEV_INTR_INTX)
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&& (entry->intx.vpin_src == PTDEV_VPIN_IOAPIC)) {
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&& (entry->ptdev_intr_info.intx.vpin_src
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== PTDEV_VPIN_IOAPIC)) {
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uint64_t rte;
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bool trigger_lvl = false;
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/* VPIN_IOAPIC src means we have vioapic enabled */
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vioapic_get_rte(vm, entry->intx.virt_pin, &rte);
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vioapic_get_rte(vm, entry->ptdev_intr_info.intx.virt_pin, &rte);
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if ((rte & IOAPIC_RTE_TRGRMOD) == IOAPIC_RTE_TRGRLVL)
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trigger_lvl = true;
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@ -315,11 +317,12 @@ ptdev_update_irq_handler(struct vm *vm, struct ptdev_remapping_info *entry)
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}
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/* update irq handler for PIC */
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if ((entry->type == PTDEV_INTR_INTX) && (phys_irq < NR_LEGACY_IRQ)
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&& (entry->intx.vpin_src == PTDEV_VPIN_PIC)) {
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&& (entry->ptdev_intr_info.intx.vpin_src == PTDEV_VPIN_PIC)) {
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enum vpic_trigger trigger;
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/* VPIN_PIC src means we have vpic enabled */
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vpic_get_irq_trigger(vm, entry->intx.virt_pin, &trigger);
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vpic_get_irq_trigger(vm,
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entry->ptdev_intr_info.intx.virt_pin, &trigger);
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if (trigger == LEVEL_TRIGGER)
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update_irq_handler(phys_irq, common_dev_handler_level);
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else
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@ -413,12 +416,12 @@ static uint64_t ptdev_build_physical_rte(struct vm *vm,
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int phys_irq = dev_to_irq(entry->node);
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int vector = dev_to_vector(entry->node);
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if (entry->intx.vpin_src == PTDEV_VPIN_IOAPIC) {
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if (entry->ptdev_intr_info.intx.vpin_src == PTDEV_VPIN_IOAPIC) {
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uint64_t vdmask, pdmask;
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uint32_t dest, low, high, delmode;
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bool phys;
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vioapic_get_rte(vm, entry->intx.virt_pin, &rte);
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vioapic_get_rte(vm, entry->ptdev_intr_info.intx.virt_pin, &rte);
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low = rte;
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high = rte >> 32;
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@ -456,7 +459,8 @@ static uint64_t ptdev_build_physical_rte(struct vm *vm,
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ioapic_get_rte(phys_irq, &physical_rte);
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rte = physical_rte;
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rte &= ~IOAPIC_RTE_TRGRMOD;
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vpic_get_irq_trigger(vm, entry->intx.virt_pin, &trigger);
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vpic_get_irq_trigger(vm,
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entry->ptdev_intr_info.intx.virt_pin, &trigger);
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if (trigger == LEVEL_TRIGGER)
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rte |= IOAPIC_RTE_TRGRLVL;
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@ -492,14 +496,15 @@ add_msix_remapping(struct vm *vm, uint16_t virt_bdf, uint16_t phys_bdf,
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entry = alloc_entry(vm, PTDEV_INTR_MSI);
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entry->virt_bdf = virt_bdf;
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entry->phys_bdf = phys_bdf;
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entry->msi.msix_entry_index = msix_entry_index;
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entry->ptdev_intr_info.msi.msix_entry_index = msix_entry_index;
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} else if ((entry->vm != vm) && is_vm0(entry->vm)) {
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entry->vm = vm;
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entry->virt_bdf = virt_bdf;
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} else if ((entry->vm != vm) && !is_vm0(entry->vm)) {
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pr_err("MSIX pbdf%x idx=%d already in vm%d with vbdf%x, not "
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"able to add into vm%d with vbdf%x", entry->phys_bdf,
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entry->msi.msix_entry_index, entry->vm->attr.id,
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entry->ptdev_intr_info.msi.msix_entry_index,
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entry->vm->attr.id,
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entry->virt_bdf, vm->attr.id, virt_bdf);
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ASSERT(0, "msix entry pbdf%x idx%d already in vm%d",
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phys_bdf, msix_entry_index, entry->vm->attr.id);
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@ -565,17 +570,19 @@ add_intx_remapping(struct vm *vm, uint8_t virt_pin,
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return &invalid_entry;
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}
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entry = alloc_entry(vm, PTDEV_INTR_INTX);
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entry->intx.phys_pin = phys_pin;
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entry->intx.virt_pin = virt_pin;
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entry->intx.vpin_src = vpin_src;
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entry->ptdev_intr_info.intx.phys_pin = phys_pin;
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entry->ptdev_intr_info.intx.virt_pin = virt_pin;
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entry->ptdev_intr_info.intx.vpin_src = vpin_src;
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} else if ((entry->vm != vm) && is_vm0(entry->vm)) {
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entry->vm = vm;
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entry->intx.virt_pin = virt_pin;
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entry->intx.vpin_src = vpin_src;
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entry->ptdev_intr_info.intx.virt_pin = virt_pin;
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entry->ptdev_intr_info.intx.vpin_src = vpin_src;
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} else if ((entry->vm != vm) && !is_vm0(entry->vm)) {
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pr_err("INTX pin%d already in vm%d with vpin%d, not able to "
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"add into vm%d with vpin%d", entry->intx.phys_pin,
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entry->vm->attr.id, entry->intx.virt_pin,
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"add into vm%d with vpin%d",
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entry->ptdev_intr_info.intx.phys_pin,
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entry->vm->attr.id,
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entry->ptdev_intr_info.intx.virt_pin,
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vm->attr.id, virt_pin);
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ASSERT(0, "intx entry pin%d already vm%d",
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phys_pin, entry->vm->attr.id);
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@ -617,10 +624,12 @@ void remove_intx_remapping(struct vm *vm, uint8_t virt_pin, bool pic_pin)
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ptdev_deactivate_entry(entry);
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dev_dbg(ACRN_DBG_IRQ,
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"deactive %s intx entry:ppin=%d, pirq=%d ",
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entry->intx.vpin_src == PTDEV_VPIN_PIC ?
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"vPIC" : "vIOAPIC", entry->intx.phys_pin, phys_irq);
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entry->ptdev_intr_info.intx.vpin_src == PTDEV_VPIN_PIC ?
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"vPIC" : "vIOAPIC",
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entry->ptdev_intr_info.intx.phys_pin, phys_irq);
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dev_dbg(ACRN_DBG_IRQ, "from vm%d vpin=%d\n",
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entry->vm->attr.id, entry->intx.virt_pin);
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entry->vm->attr.id,
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entry->ptdev_intr_info.intx.virt_pin);
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}
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release_entry(entry);
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@ -632,21 +641,23 @@ END:
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static void ptdev_intr_handle_irq(struct vm *vm,
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struct ptdev_remapping_info *entry)
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{
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switch (entry->intx.vpin_src) {
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switch (entry->ptdev_intr_info.intx.vpin_src) {
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case PTDEV_VPIN_IOAPIC:
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{
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uint64_t rte;
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bool trigger_lvl = false;
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/* VPIN_IOAPIC src means we have vioapic enabled */
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vioapic_get_rte(vm, entry->intx.virt_pin, &rte);
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vioapic_get_rte(vm, entry->ptdev_intr_info.intx.virt_pin, &rte);
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if ((rte & IOAPIC_RTE_TRGRMOD) == IOAPIC_RTE_TRGRLVL)
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trigger_lvl = true;
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if (trigger_lvl)
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vioapic_assert_irq(vm, entry->intx.virt_pin);
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vioapic_assert_irq(vm,
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entry->ptdev_intr_info.intx.virt_pin);
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else
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vioapic_pulse_irq(vm, entry->intx.virt_pin);
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vioapic_pulse_irq(vm,
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entry->ptdev_intr_info.intx.virt_pin);
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dev_dbg(ACRN_DBG_PTIRQ,
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"dev-assign: irq=0x%x assert vr: 0x%x vRTE=0x%x",
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@ -659,11 +670,14 @@ static void ptdev_intr_handle_irq(struct vm *vm,
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enum vpic_trigger trigger;
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/* VPIN_PIC src means we have vpic enabled */
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vpic_get_irq_trigger(vm, entry->intx.virt_pin, &trigger);
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vpic_get_irq_trigger(vm,
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entry->ptdev_intr_info.intx.virt_pin, &trigger);
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if (trigger == LEVEL_TRIGGER)
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vpic_assert_irq(vm, entry->intx.virt_pin);
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vpic_assert_irq(vm,
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entry->ptdev_intr_info.intx.virt_pin);
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else
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vpic_pulse_irq(vm, entry->intx.virt_pin);
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vpic_pulse_irq(vm,
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entry->ptdev_intr_info.intx.virt_pin);
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break;
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}
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default:
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@ -694,16 +708,18 @@ void ptdev_softirq(__unused int cpu)
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ptdev_intr_handle_irq(vm, entry);
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else {
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/* TODO: msi destmode check required */
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vlapic_intr_msi(vm, entry->msi.vmsi_addr,
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entry->msi.vmsi_data);
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vlapic_intr_msi(vm,
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entry->ptdev_intr_info.msi.vmsi_addr,
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entry->ptdev_intr_info.msi.vmsi_data);
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dev_dbg(ACRN_DBG_PTIRQ,
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"dev-assign: irq=0x%x MSI VR: 0x%x-0x%x",
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dev_to_irq(entry->node),
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entry->msi.virt_vector,
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entry->ptdev_intr_info.msi.virt_vector,
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irq_to_vector(dev_to_irq(entry->node)));
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dev_dbg(ACRN_DBG_PTIRQ,
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" vmsi_addr: 0x%x vmsi_data: 0x%x",
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entry->msi.vmsi_addr, entry->msi.vmsi_data);
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entry->ptdev_intr_info.msi.vmsi_addr,
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entry->ptdev_intr_info.msi.vmsi_data);
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}
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}
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}
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@ -719,7 +735,7 @@ void ptdev_intx_ack(struct vm *vm, int virt_pin,
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if (!entry)
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return;
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phys_pin = entry->intx.phys_pin;
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phys_pin = entry->ptdev_intr_info.intx.phys_pin;
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phys_irq = pin_to_irq(phys_pin);
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if (!irq_is_gsi(phys_irq))
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return;
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@ -727,7 +743,7 @@ void ptdev_intx_ack(struct vm *vm, int virt_pin,
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/* NOTE: only Level trigger will process EOI/ACK and if we got here
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* means we have this vioapic or vpic or both enabled
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*/
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switch (entry->intx.vpin_src) {
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switch (entry->ptdev_intr_info.intx.vpin_src) {
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case PTDEV_VPIN_IOAPIC:
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vioapic_deassert_irq(vm, virt_pin);
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break;
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@ -798,9 +814,9 @@ int ptdev_msix_remap(struct vm *vm, uint16_t virt_bdf,
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/* build physical config MSI, update to info->pmsi_xxx */
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ptdev_build_physical_msi(vm, info, dev_to_vector(entry->node));
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entry->msi = *info;
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entry->msi.virt_vector = info->vmsi_data & 0xFF;
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entry->msi.phys_vector = dev_to_vector(entry->node);
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entry->ptdev_intr_info.msi = *info;
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entry->ptdev_intr_info.msi.virt_vector = info->vmsi_data & 0xFF;
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entry->ptdev_intr_info.msi.phys_vector = dev_to_vector(entry->node);
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/* update irq handler according to info in guest */
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ptdev_update_irq_handler(vm, entry);
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@ -809,8 +825,10 @@ int ptdev_msix_remap(struct vm *vm, uint16_t virt_bdf,
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"PCI %x:%x.%x MSI VR[%d] 0x%x->0x%x assigned to vm%d",
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(entry->virt_bdf >> 8) & 0xFF,
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(entry->virt_bdf >> 3) & 0x1F,
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(entry->virt_bdf) & 0x7, entry->msi.msix_entry_index,
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entry->msi.virt_vector, entry->msi.phys_vector,
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(entry->virt_bdf) & 0x7,
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entry->ptdev_intr_info.msi.msix_entry_index,
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entry->ptdev_intr_info.msi.virt_vector,
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entry->ptdev_intr_info.msi.phys_vector,
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entry->vm->attr.id);
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END:
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return 0;
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@ -938,7 +956,7 @@ int ptdev_intx_pin_remap(struct vm *vm, struct ptdev_intx_info *info)
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goto END;
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/* phys_pin from physical IOAPIC */
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phys_pin = entry->intx.phys_pin;
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phys_pin = entry->ptdev_intr_info.intx.phys_pin;
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phys_irq = pin_to_irq(phys_pin);
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if (!irq_is_gsi(phys_irq))
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goto END;
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@ -952,18 +970,21 @@ int ptdev_intx_pin_remap(struct vm *vm, struct ptdev_intx_info *info)
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dev_dbg(ACRN_DBG_IRQ,
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"IOAPIC pin=%d pirq=%d vpin=%d switch from %s to %s "
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"vpin=%d for vm%d", phys_pin, phys_irq,
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entry->intx.virt_pin,
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entry->intx.vpin_src ? "vPIC" : "vIOAPIC",
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entry->intx.vpin_src ? "vIOPIC" : "vPIC",
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entry->ptdev_intr_info.intx.virt_pin,
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entry->ptdev_intr_info.intx.vpin_src ?
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"vPIC" : "vIOAPIC",
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entry->ptdev_intr_info.intx.vpin_src ?
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"vIOPIC" : "vPIC",
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info->virt_pin,
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entry->vm->attr.id);
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entry->intx.vpin_src = info->vpin_src;
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entry->intx.virt_pin = info->virt_pin;
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entry->ptdev_intr_info.intx.vpin_src = info->vpin_src;
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entry->ptdev_intr_info.intx.virt_pin = info->virt_pin;
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}
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if (is_entry_active(entry)
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&& (entry->intx.vpin_src == PTDEV_VPIN_IOAPIC)) {
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vioapic_get_rte(vm, entry->intx.virt_pin, &rte);
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&& (entry->ptdev_intr_info.intx.vpin_src
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== PTDEV_VPIN_IOAPIC)) {
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vioapic_get_rte(vm, entry->ptdev_intr_info.intx.virt_pin, &rte);
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if (((uint32_t)rte) == 0x10000) {
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/* disable interrupt */
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GSI_MASK_IRQ(phys_irq);
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@ -972,14 +993,15 @@ int ptdev_intx_pin_remap(struct vm *vm, struct ptdev_intx_info *info)
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"IOAPIC pin=%d pirq=%d deassigned ",
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phys_pin, phys_irq);
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dev_dbg(ACRN_DBG_IRQ, "from vm%d vIOAPIC vpin=%d",
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entry->vm->attr.id, entry->intx.virt_pin);
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entry->vm->attr.id,
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entry->ptdev_intr_info.intx.virt_pin);
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goto END;
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} else {
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/*update rte*/
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activate_physical_ioapic(vm, entry);
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}
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} else if (is_entry_active(entry)
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&& (entry->intx.vpin_src == PTDEV_VPIN_PIC)) {
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&& (entry->ptdev_intr_info.intx.vpin_src == PTDEV_VPIN_PIC)) {
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/* only update here
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* deactive vPIC entry when IOAPIC take it over
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*/
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@ -993,8 +1015,9 @@ int ptdev_intx_pin_remap(struct vm *vm, struct ptdev_intx_info *info)
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dev_dbg(ACRN_DBG_IRQ,
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"IOAPIC pin=%d pirq=%d assigned to vm%d %s vpin=%d",
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phys_pin, phys_irq, entry->vm->attr.id,
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entry->intx.vpin_src == PTDEV_VPIN_PIC ?
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"vPIC" : "vIOAPIC", entry->intx.virt_pin);
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entry->ptdev_intr_info.intx.vpin_src == PTDEV_VPIN_PIC ?
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"vPIC" : "vIOAPIC",
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entry->ptdev_intr_info.intx.virt_pin);
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}
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END:
|
||||
return 0;
|
||||
@ -1095,8 +1118,10 @@ static void get_entry_info(struct ptdev_remapping_info *entry, char *type,
|
||||
if (is_entry_active(entry)) {
|
||||
if (entry->type == PTDEV_INTR_MSI) {
|
||||
strcpy_s(type, 16, "MSI");
|
||||
*dest = (entry->msi.pmsi_addr & 0xFF000) >> 12;
|
||||
if (entry->msi.pmsi_data & APIC_TRIGMOD_LEVEL)
|
||||
*dest = (entry->ptdev_intr_info.msi.pmsi_addr & 0xFF000)
|
||||
>> 12;
|
||||
if (entry->ptdev_intr_info.msi.pmsi_data &
|
||||
APIC_TRIGMOD_LEVEL)
|
||||
*lvl_tm = true;
|
||||
else
|
||||
*lvl_tm = false;
|
||||
@ -1105,10 +1130,12 @@ static void get_entry_info(struct ptdev_remapping_info *entry, char *type,
|
||||
*bdf = entry->phys_bdf;
|
||||
*vbdf = entry->virt_bdf;
|
||||
} else {
|
||||
int phys_irq = pin_to_irq(entry->intx.phys_pin);
|
||||
int phys_irq = pin_to_irq(
|
||||
entry->ptdev_intr_info.intx.phys_pin);
|
||||
uint64_t rte = 0;
|
||||
|
||||
if (entry->intx.vpin_src == PTDEV_VPIN_IOAPIC)
|
||||
if (entry->ptdev_intr_info.intx.vpin_src
|
||||
== PTDEV_VPIN_IOAPIC)
|
||||
strcpy_s(type, 16, "IOAPIC");
|
||||
else
|
||||
strcpy_s(type, 16, "PIC");
|
||||
@ -1118,8 +1145,8 @@ static void get_entry_info(struct ptdev_remapping_info *entry, char *type,
|
||||
*lvl_tm = true;
|
||||
else
|
||||
*lvl_tm = false;
|
||||
*pin = entry->intx.phys_pin;
|
||||
*vpin = entry->intx.virt_pin;
|
||||
*pin = entry->ptdev_intr_info.intx.phys_pin;
|
||||
*vpin = entry->ptdev_intr_info.intx.virt_pin;
|
||||
*bdf = 0;
|
||||
*vbdf = 0;
|
||||
}
|
||||
|
@ -46,9 +46,9 @@ static void set_tss_desc(union tss_64_descriptor *desc,
|
||||
u3 = ((uint64_t)tss & 0x00FF0000) >> 16;
|
||||
|
||||
|
||||
desc->low32.value = u1 | (tss_limit & 0xFFFF);
|
||||
desc->base_addr_63_32 = (uint32_t)((uint64_t)tss >> 32);
|
||||
desc->high32.value = (u2 | ((uint32_t)type << 8) | 0x8000 | u3);
|
||||
desc->fields.low32.value = u1 | (tss_limit & 0xFFFF);
|
||||
desc->fields.base_addr_63_32 = (uint32_t)((uint64_t)tss >> 32);
|
||||
desc->fields.high32.value = (u2 | ((uint32_t)type << 8) | 0x8000 | u3);
|
||||
}
|
||||
|
||||
void load_gdtr_and_tr(void)
|
||||
|
@ -52,7 +52,7 @@ struct trusty_mem {
|
||||
struct {
|
||||
struct key_info key_info;
|
||||
struct trusty_startup_param startup_param;
|
||||
};
|
||||
} data;
|
||||
uint8_t page[CPU_PAGE_SIZE];
|
||||
} first_page;
|
||||
|
||||
@ -331,36 +331,38 @@ static bool setup_trusty_info(struct vcpu *vcpu,
|
||||
{
|
||||
uint32_t i;
|
||||
struct trusty_mem *mem;
|
||||
struct key_info *key_info;
|
||||
|
||||
mem = (struct trusty_mem *)(HPA2HVA(mem_base_hpa));
|
||||
|
||||
/* copy key_info to the first page of trusty memory */
|
||||
memcpy_s(&mem->first_page.key_info, sizeof(g_key_info),
|
||||
memcpy_s(&mem->first_page.data.key_info, sizeof(g_key_info),
|
||||
&g_key_info, sizeof(g_key_info));
|
||||
|
||||
memset(mem->first_page.key_info.dseed_list, 0,
|
||||
sizeof(mem->first_page.key_info.dseed_list));
|
||||
memset(mem->first_page.data.key_info.dseed_list, 0,
|
||||
sizeof(mem->first_page.data.key_info.dseed_list));
|
||||
/* Derive dvseed from dseed for Trusty */
|
||||
key_info = &mem->first_page.data.key_info;
|
||||
for (i = 0; i < g_key_info.num_seeds; i++) {
|
||||
if (!hkdf_sha256(mem->first_page.key_info.dseed_list[i].seed,
|
||||
if (!hkdf_sha256(key_info->dseed_list[i].seed,
|
||||
BUP_MKHI_BOOTLOADER_SEED_LEN,
|
||||
g_key_info.dseed_list[i].seed,
|
||||
BUP_MKHI_BOOTLOADER_SEED_LEN,
|
||||
NULL, 0,
|
||||
vcpu->vm->GUID, sizeof(vcpu->vm->GUID))) {
|
||||
memset(&mem->first_page.key_info, 0,
|
||||
sizeof(struct key_info));
|
||||
memset(key_info, 0, sizeof(struct key_info));
|
||||
pr_err("%s: derive dvseed failed!", __func__);
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
/* Prepare trusty startup param */
|
||||
mem->first_page.startup_param.size_of_this_struct =
|
||||
mem->first_page.data.startup_param.size_of_this_struct =
|
||||
sizeof(struct trusty_startup_param);
|
||||
mem->first_page.startup_param.mem_size = mem_size;
|
||||
mem->first_page.startup_param.tsc_per_ms = CYCLES_PER_MS;
|
||||
mem->first_page.startup_param.trusty_mem_base = TRUSTY_EPT_REBASE_GPA;
|
||||
mem->first_page.data.startup_param.mem_size = mem_size;
|
||||
mem->first_page.data.startup_param.tsc_per_ms = CYCLES_PER_MS;
|
||||
mem->first_page.data.startup_param.trusty_mem_base =
|
||||
TRUSTY_EPT_REBASE_GPA;
|
||||
|
||||
/* According to trusty boot protocol, it will use RDI as the
|
||||
* address(GPA) of startup_param on boot. Currently, the startup_param
|
||||
|
@ -80,7 +80,7 @@ struct ptdev_remapping_info {
|
||||
union {
|
||||
struct ptdev_msi_info msi;
|
||||
struct ptdev_intx_info intx;
|
||||
};
|
||||
} ptdev_intr_info;
|
||||
};
|
||||
|
||||
void ptdev_intx_ack(struct vm *vm, int virt_pin,
|
||||
|
@ -134,7 +134,7 @@ union code_segment_descriptor {
|
||||
uint32_t base_31_24:8;
|
||||
} bits;
|
||||
} high32;
|
||||
};
|
||||
} fields;
|
||||
} __aligned(8);
|
||||
|
||||
/*
|
||||
@ -169,7 +169,7 @@ union data_segment_descriptor {
|
||||
uint32_t base_31_24:8;
|
||||
} bits;
|
||||
} high32;
|
||||
};
|
||||
} fields;
|
||||
} __aligned(8);
|
||||
|
||||
/*
|
||||
@ -201,7 +201,7 @@ union system_segment_descriptor {
|
||||
uint32_t base_31_24:8;
|
||||
} bits;
|
||||
} high32;
|
||||
};
|
||||
} fields;
|
||||
} __aligned(8);
|
||||
|
||||
/*
|
||||
@ -242,7 +242,7 @@ union tss_64_descriptor {
|
||||
uint32_t rsvd_31_13:20;
|
||||
} bits;
|
||||
} offset_12;
|
||||
};
|
||||
} fields;
|
||||
} __aligned(8);
|
||||
|
||||
/*****************************************************************************
|
||||
|
@ -75,7 +75,7 @@ union idt_64_descriptor {
|
||||
} high32;
|
||||
uint32_t offset_63_32;
|
||||
uint32_t rsvd;
|
||||
};
|
||||
} fields;
|
||||
} __aligned(8);
|
||||
|
||||
/*****************************************************************************
|
||||
|
@ -81,19 +81,19 @@ struct trace_entry {
|
||||
union {
|
||||
struct {
|
||||
uint32_t a, b, c, d;
|
||||
};
|
||||
} fields_32;
|
||||
struct {
|
||||
uint8_t a1, a2, a3, a4;
|
||||
uint8_t b1, b2, b3, b4;
|
||||
uint8_t c1, c2, c3, c4;
|
||||
uint8_t d1, d2, d3, d4;
|
||||
};
|
||||
} fields_8;
|
||||
struct {
|
||||
uint64_t e;
|
||||
uint64_t f;
|
||||
};
|
||||
} fields_64;
|
||||
char str[16];
|
||||
};
|
||||
} payload;
|
||||
} __attribute__((aligned(8)));
|
||||
|
||||
static inline bool
|
||||
@ -128,8 +128,8 @@ TRACE_2L(int evid, uint64_t e, uint64_t f)
|
||||
if (!trace_check(cpu_id, evid))
|
||||
return;
|
||||
|
||||
entry.e = e;
|
||||
entry.f = f;
|
||||
entry.payload.fields_64.e = e;
|
||||
entry.payload.fields_64.f = f;
|
||||
_trace_put(cpu_id, evid, &entry);
|
||||
}
|
||||
|
||||
@ -143,10 +143,10 @@ TRACE_4I(int evid, uint32_t a, uint32_t b, uint32_t c,
|
||||
if (!trace_check(cpu_id, evid))
|
||||
return;
|
||||
|
||||
entry.a = a;
|
||||
entry.b = b;
|
||||
entry.c = c;
|
||||
entry.d = d;
|
||||
entry.payload.fields_32.a = a;
|
||||
entry.payload.fields_32.b = b;
|
||||
entry.payload.fields_32.c = c;
|
||||
entry.payload.fields_32.d = d;
|
||||
_trace_put(cpu_id, evid, &entry);
|
||||
}
|
||||
|
||||
@ -160,12 +160,12 @@ TRACE_6C(int evid, uint8_t a1, uint8_t a2, uint8_t a3,
|
||||
if (!trace_check(cpu_id, evid))
|
||||
return;
|
||||
|
||||
entry.a1 = a1;
|
||||
entry.a2 = a2;
|
||||
entry.a3 = a3;
|
||||
entry.a4 = a4;
|
||||
entry.b1 = b1;
|
||||
entry.b2 = b2;
|
||||
entry.payload.fields_8.a1 = a1;
|
||||
entry.payload.fields_8.a2 = a2;
|
||||
entry.payload.fields_8.a3 = a3;
|
||||
entry.payload.fields_8.a4 = a4;
|
||||
entry.payload.fields_8.b1 = b1;
|
||||
entry.payload.fields_8.b2 = b2;
|
||||
_trace_put(cpu_id, evid, &entry);
|
||||
}
|
||||
|
||||
@ -183,15 +183,15 @@ TRACE_16STR(int evid, const char name[])
|
||||
if (!trace_check(cpu_id, evid))
|
||||
return;
|
||||
|
||||
entry.e = 0;
|
||||
entry.f = 0;
|
||||
entry.payload.fields_64.e = 0;
|
||||
entry.payload.fields_64.f = 0;
|
||||
|
||||
len = strnlen_s(name, 20);
|
||||
len = (len > 16) ? 16 : len;
|
||||
for (i = 0; i < len; i++)
|
||||
entry.str[i] = name[i];
|
||||
entry.payload.str[i] = name[i];
|
||||
|
||||
entry.str[15] = 0;
|
||||
entry.payload.str[15] = 0;
|
||||
_trace_put(cpu_id, evid, &entry);
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user