From 0222bb0fc12d1b85b06846352c721772c46fe3bb Mon Sep 17 00:00:00 2001
From: Jian Jun Chen <jian.jun.chen@intel.com>
Date: Thu, 23 Oct 2025 13:55:22 +0800
Subject: [PATCH] hv: multi-arch: move {arch_}get_random_value to random.c

Tracked-On: #8834
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
---
 hypervisor/arch/x86/Makefile               |  1 +
 hypervisor/arch/x86/guest/vcpu.c           |  1 +
 hypervisor/arch/x86/lib/random.c           | 20 ++++++++++++++++++++
 hypervisor/arch/x86/security.c             | 14 +-------------
 hypervisor/include/arch/x86/asm/security.h |  1 -
 hypervisor/include/common/random.h         | 17 +++++++++++++++++
 6 files changed, 40 insertions(+), 14 deletions(-)
 create mode 100644 hypervisor/arch/x86/lib/random.c
 create mode 100644 hypervisor/include/common/random.h

diff --git a/hypervisor/arch/x86/Makefile b/hypervisor/arch/x86/Makefile
index e75150436..e36b61232 100644
--- a/hypervisor/arch/x86/Makefile
+++ b/hypervisor/arch/x86/Makefile
@@ -52,6 +52,7 @@ ASFLAGS += -m64 -nostdinc -nostdlib
 
 # library componment
 LIB_C_SRCS += arch/x86/lib/memory.c
+LIB_C_SRCS += arch/x86/lib/random.c
 
 # retpoline support
 ifeq (true, $(shell [ $(GCC_MAJOR) -eq 7 ] && [ $(GCC_MINOR) -ge 3 ] && echo true))
diff --git a/hypervisor/arch/x86/guest/vcpu.c b/hypervisor/arch/x86/guest/vcpu.c
index d7f8aa082..e560164f1 100755
--- a/hypervisor/arch/x86/guest/vcpu.c
+++ b/hypervisor/arch/x86/guest/vcpu.c
@@ -14,6 +14,7 @@
 #include <asm/cpufeatures.h>
 #include <asm/cpu_caps.h>
 #include <per_cpu.h>
+#include <random.h>
 #include <asm/init.h>
 #include <asm/guest/vm.h>
 #include <asm/guest/vmcs.h>
diff --git a/hypervisor/arch/x86/lib/random.c b/hypervisor/arch/x86/lib/random.c
new file mode 100644
index 000000000..75693ee05
--- /dev/null
+++ b/hypervisor/arch/x86/lib/random.c
@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) 2025 Intel Corporation.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <types.h>
+
+uint64_t arch_get_random_value(void)
+{
+	uint64_t random;
+
+	asm volatile ("1: rdrand %%rax\n"
+			"jnc 1b\n"
+			"mov %%rax, %0\n"
+			: "=r"(random)
+			:
+			:"%rax");
+	return random;
+}
\ No newline at end of file
diff --git a/hypervisor/arch/x86/security.c b/hypervisor/arch/x86/security.c
index a1f761a88..0028b856d 100644
--- a/hypervisor/arch/x86/security.c
+++ b/hypervisor/arch/x86/security.c
@@ -12,6 +12,7 @@
 #include <asm/cpu_caps.h>
 #include <asm/security.h>
 #include <logmsg.h>
+#include <random.h>
 
 static bool skip_l1dfl_vmentry;
 static bool cpu_md_clear;
@@ -198,19 +199,6 @@ void cpu_internal_buffers_clear(void)
 	}
 }
 
-uint64_t get_random_value(void)
-{
-	uint64_t random;
-
-	asm volatile ("1: rdrand %%rax\n"
-			"jnc 1b\n"
-			"mov %%rax, %0\n"
-			: "=r"(random)
-			:
-			:"%rax");
-	return random;
-}
-
 #ifdef STACK_PROTECTOR
 void set_fs_base(void)
 {
diff --git a/hypervisor/include/arch/x86/asm/security.h b/hypervisor/include/arch/x86/asm/security.h
index 6f16b0e06..30ab7f616 100644
--- a/hypervisor/include/arch/x86/asm/security.h
+++ b/hypervisor/include/arch/x86/asm/security.h
@@ -22,7 +22,6 @@ void cpu_l1d_flush(void);
 bool check_cpu_security_cap(void);
 void cpu_internal_buffers_clear(void);
 bool is_ept_force_4k_ipage(void);
-uint64_t get_random_value(void);
 void disable_rrsba(void);
 
 #ifdef STACK_PROTECTOR
diff --git a/hypervisor/include/common/random.h b/hypervisor/include/common/random.h
new file mode 100644
index 000000000..0992b8c95
--- /dev/null
+++ b/hypervisor/include/common/random.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2025 Intel Corporation.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef COMMON_RANDOM_H
+#define COMMON_RANDOM_H
+
+uint64_t arch_get_random_value(void);
+
+static inline uint64_t get_random_value(void)
+{
+	return arch_get_random_value();
+}
+
+#endif /* COMMON_RANDOM_H */