HV: change vuart port (used by SOS) to ttyS2

On MRB, there are some differences for SOS uart setting between
debug version and release version:
  for debug version, ttyS0 is vuart, ttyS1 is 00:18.0, ttyS2 is 00:18.1,
    ttyS3 is 00:18.3.
  for release version, ttyS0 is 00:18.0, ttyS1 is 00:18.1, ttyS2 is
00:18.2, ttyS3 is 00:18.3. There is no vuart.

port: 00:18.0 is for bluetooth usage, ttyS0 can't be used as SOS console
for release build.

after change, debug build: vuart -->ttyS2 (SOS console);
release version: ttyS2; 00:18.2, it can be used as SOS console too.

for UEFI platform, also change acrn.conf console=ttyS0-->ttyS2
to matched with vart change.

Tracked-On: #1690
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
This commit is contained in:
Minggui Cao 2018-10-31 11:46:57 +08:00 committed by lijinxia
parent 9029ac4bd5
commit 0307b21896
2 changed files with 2 additions and 2 deletions

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@ -1,3 +1,3 @@
title The ACRN Service OS
linux /EFI/org.clearlinux/kernel-org.clearlinux.pk414-sos.4.14.52-63
options pci_devices_ignore=(0:18:1) console=tty0 console=ttyS0 i915.nuclear_pageflip=1 root=PARTUUID=<UUID of rootfs partition> rw rootwait ignore_loglevel no_timer_check consoleblank=0 i915.tsd_init=7 i915.tsd_delay=2000 i915.avail_planes_per_pipe=0x01010F i915.domain_plane_owners=0x011111110000 i915.enable_guc_loading=0 i915.enable_guc_submission=0 i915.enable_preemption=1 i915.context_priority_mode=2 i915.enable_gvt=1 i915.enable_initial_modeset=1 i915.enable_guc=0 hvlog=2M@0x1FE00000
options pci_devices_ignore=(0:18:1) console=tty0 console=ttyS2 i915.nuclear_pageflip=1 root=PARTUUID=<UUID of rootfs partition> rw rootwait ignore_loglevel no_timer_check consoleblank=0 i915.tsd_init=7 i915.tsd_delay=2000 i915.avail_planes_per_pipe=0x01010F i915.domain_plane_owners=0x011111110000 i915.enable_guc_loading=0 i915.enable_guc_submission=0 i915.enable_preemption=1 i915.context_priority_mode=2 i915.enable_gvt=1 i915.enable_initial_modeset=1 i915.enable_guc=0 hvlog=2M@0x1FE00000

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@ -32,7 +32,7 @@
#include "uart16550.h"
#define COM1_BASE 0x3F8U
#define COM1_BASE 0x3E8U
#ifndef CONFIG_PARTITION_MODE
static char vuart_rx_buf[RX_BUF_SIZE];