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hv: fix 'No brackets to then/else'

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- add missing brackets for 'if/else' statements based on MISRA-C
  requirements

v1 -> v2:
 * add brackets for each conditions in 'if' statements to improve
   the readability
 * modify 'ptdev_init' to make the logic clearer

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
This commit is contained in:
Shiqing Gao
2018-09-30 14:04:18 +08:00
committed by wenlingz
parent 71927f3c5b
commit 0317cfb2b6
23 changed files with 131 additions and 72 deletions
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14
hypervisor/arch/x86/lapic.c
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@@ -134,16 +134,18 @@ static union lapic_base_msr lapic_base_msr;
static inline uint32_t read_lapic_reg32(uint32_t offset)
{
if (offset < 0x20U || offset > 0x3ffU)
if ((offset < 0x20U) || (offset > 0x3ffU)) {
return 0;
}
return mmio_read32(lapic_info.xapic.vaddr + offset);
}
void write_lapic_reg32(uint32_t offset, uint32_t value)
{
if (offset < 0x20U || offset > 0x3ffU)
if ((offset < 0x20U) || (offset > 0x3ffU)) {
return;
}
mmio_write32(value, lapic_info.xapic.vaddr + offset);
}
@@ -398,10 +400,11 @@ send_startup_ipi(enum intr_cpu_startup_shorthand cpu_startup_shorthand,
write_lapic_reg32(LAPIC_INT_COMMAND_REGISTER_0, icr.value_32.lo_32);
wait_for_delivery();
if (boot_cpu_data.family == 6U)
if (boot_cpu_data.family == 6U) {
udelay(10U); /* 10us is enough for Modern processors */
else
} else {
udelay(200U); /* 200us for old processors */
}
/* Send another start IPI as per the Intel Arch specification */
write_lapic_reg32(LAPIC_INT_COMMAND_REGISTER_1, icr.value_32.hi_32);
@@ -449,8 +452,9 @@ int send_shorthand_ipi(uint8_t vector,
if ((shorthand < INTR_LAPIC_ICR_SELF)
|| (shorthand > INTR_LAPIC_ICR_ALL_EX_SELF)
|| (delivery_mode > INTR_LAPIC_ICR_NMI))
|| (delivery_mode > INTR_LAPIC_ICR_NMI)) {
status = -EINVAL;
}
ASSERT(status == 0, "Incorrect arguments");