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hv: mmu: replace dynamic memory allocation in memory
Replace dynamic memory allocation in memory management with static memory allocation. Since the static memory allocation can guarantee the allocation never failed, so split_large_page and construct_pgentry don't need to return a errno any more. Besides, the destroy_ept don't need to free page any more. Instead, it would memset the eptp to 0 to make sure we can't walk this paging table again. Tracked-On: #861 Signed-off-by: Li, Fei1 <fei1.li@intel.com>
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@@ -35,6 +35,7 @@
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#ifndef ASSEMBLER
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#include <cpu.h>
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#include <page.h>
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/* Define cache line size (in bytes) */
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#define CACHE_LINE_SIZE 64U
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@@ -53,11 +54,6 @@ static inline uint64_t round_page_down(uint64_t addr)
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return (addr & CPU_PAGE_MASK);
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}
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enum _page_table_type {
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PTT_PRIMARY = 0, /* Mapping for hypervisor */
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PTT_EPT = 1,
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};
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/* Represent the 4 levels of translation tables in IA-32e paging mode */
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enum _page_table_level {
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IA32E_PML4 = 0,
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@@ -83,13 +79,10 @@ void free_paging_struct(void *ptr);
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void enable_paging(uint64_t pml4_base_addr);
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void enable_smep(void);
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void init_paging(void);
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void mmu_add(uint64_t *pml4_page, uint64_t paddr_base,
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uint64_t vaddr_base, uint64_t size,
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uint64_t prot, enum _page_table_type ptt);
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void mmu_modify_or_del(uint64_t *pml4_page,
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uint64_t vaddr_base, uint64_t size,
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uint64_t prot_set, uint64_t prot_clr,
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enum _page_table_type ptt, uint32_t type);
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void mmu_add(uint64_t *pml4_page, uint64_t paddr_base, uint64_t vaddr_base,
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uint64_t size, uint64_t prot, const struct memory_ops *mem_ops);
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void mmu_modify_or_del(uint64_t *pml4_page, uint64_t vaddr_base, uint64_t size,
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uint64_t prot_set, uint64_t prot_clr, const struct memory_ops *mem_ops, uint32_t type);
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int check_vmx_mmu_cap(void);
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uint16_t allocate_vpid(void);
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void flush_vpid_single(uint16_t vpid);
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@@ -100,7 +93,7 @@ bool check_continuous_hpa(struct vm *vm, uint64_t gpa_arg, uint64_t size_arg);
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*@pre (pml4_page != NULL) && (pg_size != NULL)
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*/
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uint64_t *lookup_address(uint64_t *pml4_page, uint64_t addr,
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uint64_t *pg_size, enum _page_table_type ptt);
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uint64_t *pg_size, const struct memory_ops *mem_ops);
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#pragma pack(1)
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@@ -166,7 +159,6 @@ void ept_mr_modify(struct vm *vm, uint64_t *pml4_page, uint64_t gpa,
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*/
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void ept_mr_del(struct vm *vm, uint64_t *pml4_page, uint64_t gpa,
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uint64_t size);
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void free_ept_mem(uint64_t *pml4_page);
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int ept_violation_vmexit_handler(struct vcpu *vcpu);
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int ept_misconfig_vmexit_handler(__unused struct vcpu *vcpu);
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@@ -13,6 +13,21 @@
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/* size of the low MMIO address space: 2GB */
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#define PLATFORM_LO_MMIO_SIZE 0x80000000UL
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#define PML4_PAGE_NUM(size) 1UL
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#define PDPT_PAGE_NUM(size) (((size) + PML4E_SIZE - 1UL) >> PML4E_SHIFT)
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#define PD_PAGE_NUM(size) (((size) + PDPTE_SIZE - 1UL) >> PDPTE_SHIFT)
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#define PT_PAGE_NUM(size) (((size) + PDE_SIZE - 1UL) >> PDE_SHIFT)
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/* The size of the guest physical address space, covered by the EPT page table of a VM */
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#define EPT_ADDRESS_SPACE(size) ((size != 0UL) ? (size + PLATFORM_LO_MMIO_SIZE) : 0UL)
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#define TRUSTY_PML4_PAGE_NUM(size) (1UL)
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#define TRUSTY_PDPT_PAGE_NUM(size) (1UL)
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#define TRUSTY_PD_PAGE_NUM(size) (PD_PAGE_NUM(size))
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#define TRUSTY_PT_PAGE_NUM(size) (PT_PAGE_NUM(size))
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#define TRUSTY_PGTABLE_PAGE_NUM(size) \
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(TRUSTY_PML4_PAGE_NUM(size) + TRUSTY_PDPT_PAGE_NUM(size) + TRUSTY_PD_PAGE_NUM(size) + TRUSTY_PT_PAGE_NUM(size))
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struct page {
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uint8_t contents[PAGE_SIZE];
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} __aligned(PAGE_SIZE);
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@@ -162,9 +162,4 @@ static inline uint64_t pdpte_large(uint64_t pdpte)
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return pdpte & PAGE_PSE;
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}
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static inline uint64_t pgentry_present(enum _page_table_type ptt, uint64_t pte)
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{
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return (ptt == PTT_PRIMARY) ? (pte & PAGE_PRESENT) : (pte & EPT_RWX);
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}
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#endif /* PGTABLE_H */
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