github/acrn-hypervisor
1
0
Fork 0
mirror of https://github.com/projectacrn/acrn-hypervisor.git synced 2025-09-09 04:39:34 +00:00
Code Issues Projects Releases Wiki Activity

hv: remove deprecated hypercalls

Browse Source 
below hypercalls are wrapped to HC_SET_IRQLINE:
- HC_ASSERT_IRQLINE
- HC_DEASSERT_IRQLINE
- HC_PULSE_IRQLINE

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Yonghua Huang
2018-10-27 02:01:19 +08:00
committed by lijinxia
parent bf7b1cf744
commit 05bb7aa212
4 changed files with 0 additions and 157 deletions
Download Patch File Download Diff File Expand all files Collapse all files

34
hypervisor/include/public/acrn_common.h
View File

@@ -336,12 +336,6 @@ struct acrn_set_ioreq_buffer {
uint64_t req_buf;
} __aligned(8);
/** Interrupt type for acrn_irqline: inject interrupt to IOAPIC */
#define ACRN_INTR_TYPE_ISA 0U
/** Interrupt type for acrn_irqline: inject interrupt to both PIC and IOAPIC */
#define ACRN_INTR_TYPE_IOAPIC 1U
/** Operation types for setting IRQ line */
#define GSI_SET_HIGH 0U
#define GSI_SET_LOW 1U
@@ -358,34 +352,6 @@ struct acrn_irqline_ops {
uint32_t op;
} __aligned(8);
/**
* @brief Info to assert/deassert/pulse a virtual IRQ line for a VM
*
* the parameter for HC_ASSERT_IRQLINE/HC_DEASSERT_IRQLINE/HC_PULSE_IRQLINE
* hypercall
*/
struct acrn_irqline {
/** interrupt type which could be IOAPIC or ISA */
uint32_t intr_type;
/** reserved for alignment padding */
uint32_t reserved;
/** pic IRQ for ISA type */
uint32_t pic_irq;
/** Reserved */
uint32_t reserved0;
/** ioapic IRQ for IOAPIC & ISA TYPE,
* if ~0U then this IRQ will not be injected
*/
uint32_t ioapic_irq;
/** Reserved */
uint32_t reserved1;
} __aligned(8);
/**
* @brief Info to inject a MSI interrupt to VM
*

3
hypervisor/include/public/acrn_hv_defs.h
View File

@@ -41,9 +41,6 @@
/* IRQ and Interrupts */
#define HC_ID_IRQ_BASE 0x20UL
#define HC_ASSERT_IRQLINE BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x00UL)
#define HC_DEASSERT_IRQLINE BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x01UL)
#define HC_PULSE_IRQLINE BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x02UL)
#define HC_INJECT_MSI BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x03UL)
#define HC_VM_INTR_MONITOR BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x04UL)
#define HC_SET_IRQLINE BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x05UL)