mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-06-21 13:08:42 +00:00
hv: remove deprecated hypercalls
below hypercalls are wrapped to HC_SET_IRQLINE: - HC_ASSERT_IRQLINE - HC_DEASSERT_IRQLINE - HC_PULSE_IRQLINE Tracked-On: #861 Signed-off-by: Yonghua Huang <yonghua.huang@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com>
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bf7b1cf744
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05bb7aa212
@ -83,21 +83,6 @@ int vmcall_vmexit_handler(struct vcpu *vcpu)
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ret = hcall_set_vcpu_regs(vm, (uint16_t)param1, param2);
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ret = hcall_set_vcpu_regs(vm, (uint16_t)param1, param2);
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break;
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break;
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case HC_ASSERT_IRQLINE:
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/* param1: vmid */
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ret = hcall_assert_irqline(vm, (uint16_t)param1, param2);
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break;
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case HC_DEASSERT_IRQLINE:
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/* param1: vmid */
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ret = hcall_deassert_irqline(vm, (uint16_t)param1, param2);
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break;
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case HC_PULSE_IRQLINE:
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/* param1: vmid */
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ret = hcall_pulse_irqline(vm, (uint16_t)param1, param2);
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break;
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case HC_SET_IRQLINE:
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case HC_SET_IRQLINE:
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/* param1: vmid */
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/* param1: vmid */
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ret = hcall_set_irqline(vm, (uint16_t)param1,
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ret = hcall_set_irqline(vm, (uint16_t)param1,
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@ -68,60 +68,6 @@ int32_t hcall_get_api_version(struct vm *vm, uint64_t param)
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return 0;
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return 0;
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}
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}
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/**
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*@pre Pointer vm shall point to VM0
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*/
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static int32_t
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handle_virt_irqline(const struct vm *vm, uint16_t target_vmid,
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const struct acrn_irqline *param, uint32_t operation)
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{
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int32_t ret = 0;
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uint32_t intr_type;
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struct vm *target_vm = get_vm_from_vmid(target_vmid);
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if ((param == NULL) || target_vm == NULL) {
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return -EINVAL;
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}
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/* Check valid irq */
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if (param->intr_type == ACRN_INTR_TYPE_IOAPIC
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&& param->ioapic_irq >= vioapic_pincount(vm)) {
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return -EINVAL;
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}
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if (param->intr_type == ACRN_INTR_TYPE_ISA
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&& (param->pic_irq >= vpic_pincount()
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|| (param->ioapic_irq != (~0U)
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&& param->ioapic_irq >= vioapic_pincount(vm)))) {
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return -EINVAL;
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}
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intr_type = param->intr_type;
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switch (intr_type) {
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case ACRN_INTR_TYPE_ISA:
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/* Call vpic for pic injection */
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vpic_set_irq(target_vm, param->pic_irq, operation);
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/* call vioapic for ioapic injection if ioapic_irq != ~0U*/
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if (param->ioapic_irq != (~0U)) {
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/* handle IOAPIC irqline */
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vioapic_set_irq(target_vm,
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param->ioapic_irq, operation);
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}
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break;
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case ACRN_INTR_TYPE_IOAPIC:
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/* handle IOAPIC irqline */
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vioapic_set_irq(target_vm, param->ioapic_irq, operation);
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break;
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default:
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dev_dbg(ACRN_DBG_HYCALL, "vINTR inject failed. type=%d",
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intr_type);
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ret = -EINVAL;
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}
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return ret;
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}
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/**
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/**
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*@pre Pointer vm shall point to VM0
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*@pre Pointer vm shall point to VM0
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*/
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*/
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@ -245,57 +191,6 @@ int32_t hcall_reset_vm(uint16_t vmid)
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return reset_vm(target_vm);
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return reset_vm(target_vm);
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}
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}
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/**
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*@pre Pointer vm shall point to VM0
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*/
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int32_t hcall_assert_irqline(struct vm *vm, uint16_t vmid, uint64_t param)
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{
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int32_t ret;
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struct acrn_irqline irqline;
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if (copy_from_gpa(vm, &irqline, param, sizeof(irqline)) != 0) {
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pr_err("%s: Unable copy param to vm\n", __func__);
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return -1;
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}
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ret = handle_virt_irqline(vm, vmid, &irqline, GSI_SET_HIGH);
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return ret;
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}
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/**
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*@pre Pointer vm shall point to VM0
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*/
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int32_t hcall_deassert_irqline(struct vm *vm, uint16_t vmid, uint64_t param)
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{
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int32_t ret;
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struct acrn_irqline irqline;
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if (copy_from_gpa(vm, &irqline, param, sizeof(irqline)) != 0) {
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pr_err("%s: Unable copy param to vm\n", __func__);
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return -1;
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}
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ret = handle_virt_irqline(vm, vmid, &irqline, GSI_SET_LOW);
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return ret;
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}
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/**
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*@pre Pointer vm shall point to VM0
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*/
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int32_t hcall_pulse_irqline(struct vm *vm, uint16_t vmid, uint64_t param)
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{
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int32_t ret;
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struct acrn_irqline irqline;
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if (copy_from_gpa(vm, &irqline, param, sizeof(irqline)) != 0) {
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pr_err("%s: Unable copy param to vm\n", __func__);
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return -1;
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}
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ret = handle_virt_irqline(vm, vmid, &irqline, GSI_RAISING_PULSE);
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return ret;
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}
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/**
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/**
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*@pre Pointer vm shall point to VM0
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*@pre Pointer vm shall point to VM0
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*/
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*/
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@ -336,12 +336,6 @@ struct acrn_set_ioreq_buffer {
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uint64_t req_buf;
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uint64_t req_buf;
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} __aligned(8);
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} __aligned(8);
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/** Interrupt type for acrn_irqline: inject interrupt to IOAPIC */
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#define ACRN_INTR_TYPE_ISA 0U
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/** Interrupt type for acrn_irqline: inject interrupt to both PIC and IOAPIC */
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#define ACRN_INTR_TYPE_IOAPIC 1U
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/** Operation types for setting IRQ line */
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/** Operation types for setting IRQ line */
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#define GSI_SET_HIGH 0U
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#define GSI_SET_HIGH 0U
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#define GSI_SET_LOW 1U
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#define GSI_SET_LOW 1U
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@ -358,34 +352,6 @@ struct acrn_irqline_ops {
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uint32_t op;
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uint32_t op;
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} __aligned(8);
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} __aligned(8);
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/**
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* @brief Info to assert/deassert/pulse a virtual IRQ line for a VM
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*
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* the parameter for HC_ASSERT_IRQLINE/HC_DEASSERT_IRQLINE/HC_PULSE_IRQLINE
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* hypercall
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*/
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struct acrn_irqline {
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/** interrupt type which could be IOAPIC or ISA */
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uint32_t intr_type;
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/** reserved for alignment padding */
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uint32_t reserved;
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/** pic IRQ for ISA type */
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uint32_t pic_irq;
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/** Reserved */
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uint32_t reserved0;
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/** ioapic IRQ for IOAPIC & ISA TYPE,
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* if ~0U then this IRQ will not be injected
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*/
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uint32_t ioapic_irq;
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/** Reserved */
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uint32_t reserved1;
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} __aligned(8);
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/**
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/**
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* @brief Info to inject a MSI interrupt to VM
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* @brief Info to inject a MSI interrupt to VM
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*
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*
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@ -41,9 +41,6 @@
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/* IRQ and Interrupts */
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/* IRQ and Interrupts */
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#define HC_ID_IRQ_BASE 0x20UL
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#define HC_ID_IRQ_BASE 0x20UL
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#define HC_ASSERT_IRQLINE BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x00UL)
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#define HC_DEASSERT_IRQLINE BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x01UL)
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#define HC_PULSE_IRQLINE BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x02UL)
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#define HC_INJECT_MSI BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x03UL)
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#define HC_INJECT_MSI BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x03UL)
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#define HC_VM_INTR_MONITOR BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x04UL)
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#define HC_VM_INTR_MONITOR BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x04UL)
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#define HC_SET_IRQLINE BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x05UL)
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#define HC_SET_IRQLINE BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x05UL)
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