hv: remove deprecated hypercalls

below hypercalls are wrapped to HC_SET_IRQLINE:
- HC_ASSERT_IRQLINE
- HC_DEASSERT_IRQLINE
- HC_PULSE_IRQLINE

Tracked-On: #861
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Yonghua Huang 2018-10-27 02:01:19 +08:00 committed by lijinxia
parent bf7b1cf744
commit 05bb7aa212
4 changed files with 0 additions and 157 deletions

View File

@ -83,21 +83,6 @@ int vmcall_vmexit_handler(struct vcpu *vcpu)
ret = hcall_set_vcpu_regs(vm, (uint16_t)param1, param2); ret = hcall_set_vcpu_regs(vm, (uint16_t)param1, param2);
break; break;
case HC_ASSERT_IRQLINE:
/* param1: vmid */
ret = hcall_assert_irqline(vm, (uint16_t)param1, param2);
break;
case HC_DEASSERT_IRQLINE:
/* param1: vmid */
ret = hcall_deassert_irqline(vm, (uint16_t)param1, param2);
break;
case HC_PULSE_IRQLINE:
/* param1: vmid */
ret = hcall_pulse_irqline(vm, (uint16_t)param1, param2);
break;
case HC_SET_IRQLINE: case HC_SET_IRQLINE:
/* param1: vmid */ /* param1: vmid */
ret = hcall_set_irqline(vm, (uint16_t)param1, ret = hcall_set_irqline(vm, (uint16_t)param1,

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@ -68,60 +68,6 @@ int32_t hcall_get_api_version(struct vm *vm, uint64_t param)
return 0; return 0;
} }
/**
*@pre Pointer vm shall point to VM0
*/
static int32_t
handle_virt_irqline(const struct vm *vm, uint16_t target_vmid,
const struct acrn_irqline *param, uint32_t operation)
{
int32_t ret = 0;
uint32_t intr_type;
struct vm *target_vm = get_vm_from_vmid(target_vmid);
if ((param == NULL) || target_vm == NULL) {
return -EINVAL;
}
/* Check valid irq */
if (param->intr_type == ACRN_INTR_TYPE_IOAPIC
&& param->ioapic_irq >= vioapic_pincount(vm)) {
return -EINVAL;
}
if (param->intr_type == ACRN_INTR_TYPE_ISA
&& (param->pic_irq >= vpic_pincount()
|| (param->ioapic_irq != (~0U)
&& param->ioapic_irq >= vioapic_pincount(vm)))) {
return -EINVAL;
}
intr_type = param->intr_type;
switch (intr_type) {
case ACRN_INTR_TYPE_ISA:
/* Call vpic for pic injection */
vpic_set_irq(target_vm, param->pic_irq, operation);
/* call vioapic for ioapic injection if ioapic_irq != ~0U*/
if (param->ioapic_irq != (~0U)) {
/* handle IOAPIC irqline */
vioapic_set_irq(target_vm,
param->ioapic_irq, operation);
}
break;
case ACRN_INTR_TYPE_IOAPIC:
/* handle IOAPIC irqline */
vioapic_set_irq(target_vm, param->ioapic_irq, operation);
break;
default:
dev_dbg(ACRN_DBG_HYCALL, "vINTR inject failed. type=%d",
intr_type);
ret = -EINVAL;
}
return ret;
}
/** /**
*@pre Pointer vm shall point to VM0 *@pre Pointer vm shall point to VM0
*/ */
@ -245,57 +191,6 @@ int32_t hcall_reset_vm(uint16_t vmid)
return reset_vm(target_vm); return reset_vm(target_vm);
} }
/**
*@pre Pointer vm shall point to VM0
*/
int32_t hcall_assert_irqline(struct vm *vm, uint16_t vmid, uint64_t param)
{
int32_t ret;
struct acrn_irqline irqline;
if (copy_from_gpa(vm, &irqline, param, sizeof(irqline)) != 0) {
pr_err("%s: Unable copy param to vm\n", __func__);
return -1;
}
ret = handle_virt_irqline(vm, vmid, &irqline, GSI_SET_HIGH);
return ret;
}
/**
*@pre Pointer vm shall point to VM0
*/
int32_t hcall_deassert_irqline(struct vm *vm, uint16_t vmid, uint64_t param)
{
int32_t ret;
struct acrn_irqline irqline;
if (copy_from_gpa(vm, &irqline, param, sizeof(irqline)) != 0) {
pr_err("%s: Unable copy param to vm\n", __func__);
return -1;
}
ret = handle_virt_irqline(vm, vmid, &irqline, GSI_SET_LOW);
return ret;
}
/**
*@pre Pointer vm shall point to VM0
*/
int32_t hcall_pulse_irqline(struct vm *vm, uint16_t vmid, uint64_t param)
{
int32_t ret;
struct acrn_irqline irqline;
if (copy_from_gpa(vm, &irqline, param, sizeof(irqline)) != 0) {
pr_err("%s: Unable copy param to vm\n", __func__);
return -1;
}
ret = handle_virt_irqline(vm, vmid, &irqline, GSI_RAISING_PULSE);
return ret;
}
/** /**
*@pre Pointer vm shall point to VM0 *@pre Pointer vm shall point to VM0
*/ */

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@ -336,12 +336,6 @@ struct acrn_set_ioreq_buffer {
uint64_t req_buf; uint64_t req_buf;
} __aligned(8); } __aligned(8);
/** Interrupt type for acrn_irqline: inject interrupt to IOAPIC */
#define ACRN_INTR_TYPE_ISA 0U
/** Interrupt type for acrn_irqline: inject interrupt to both PIC and IOAPIC */
#define ACRN_INTR_TYPE_IOAPIC 1U
/** Operation types for setting IRQ line */ /** Operation types for setting IRQ line */
#define GSI_SET_HIGH 0U #define GSI_SET_HIGH 0U
#define GSI_SET_LOW 1U #define GSI_SET_LOW 1U
@ -358,34 +352,6 @@ struct acrn_irqline_ops {
uint32_t op; uint32_t op;
} __aligned(8); } __aligned(8);
/**
* @brief Info to assert/deassert/pulse a virtual IRQ line for a VM
*
* the parameter for HC_ASSERT_IRQLINE/HC_DEASSERT_IRQLINE/HC_PULSE_IRQLINE
* hypercall
*/
struct acrn_irqline {
/** interrupt type which could be IOAPIC or ISA */
uint32_t intr_type;
/** reserved for alignment padding */
uint32_t reserved;
/** pic IRQ for ISA type */
uint32_t pic_irq;
/** Reserved */
uint32_t reserved0;
/** ioapic IRQ for IOAPIC & ISA TYPE,
* if ~0U then this IRQ will not be injected
*/
uint32_t ioapic_irq;
/** Reserved */
uint32_t reserved1;
} __aligned(8);
/** /**
* @brief Info to inject a MSI interrupt to VM * @brief Info to inject a MSI interrupt to VM
* *

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@ -41,9 +41,6 @@
/* IRQ and Interrupts */ /* IRQ and Interrupts */
#define HC_ID_IRQ_BASE 0x20UL #define HC_ID_IRQ_BASE 0x20UL
#define HC_ASSERT_IRQLINE BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x00UL)
#define HC_DEASSERT_IRQLINE BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x01UL)
#define HC_PULSE_IRQLINE BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x02UL)
#define HC_INJECT_MSI BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x03UL) #define HC_INJECT_MSI BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x03UL)
#define HC_VM_INTR_MONITOR BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x04UL) #define HC_VM_INTR_MONITOR BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x04UL)
#define HC_SET_IRQLINE BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x05UL) #define HC_SET_IRQLINE BASE_HC_ID(HC_ID, HC_ID_IRQ_BASE + 0x05UL)