hv: riscv: Add skeleton vcpu and vm to enable RISC-V build

This commit also removes dummy files added in early development stage.

Tracked-On: #8830
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>
This commit is contained in:
Yifan Liu
2025-10-28 02:54:25 +00:00
committed by acrnsi-robot
parent 5fcfa7e2fd
commit 0e333ca422
8 changed files with 91 additions and 69 deletions

View File

@@ -7,11 +7,14 @@
#ifndef RISCV_VCPU_H
#define RISCV_VCPU_H
#include <types.h>
#include <errno.h>
#include <cpu.h>
#include <io_req.h>
#ifndef ASSEMBLER
struct acrn_vcpu_arch {
};
} __aligned(PAGE_SIZE);
#endif /* ASSEMBLER */
#endif /* RISCV_VCPU_H */

View File

@@ -7,15 +7,15 @@
#ifndef RISCV_VM_H_
#define RISCV_VM_H_
#include <vm_configurations.h>
#include <vuart.h>
#define INVALID_PIO_IDX -1U
#define UART_PIO_IDX0 INVALID_PIO_IDX
/* FIXME: dummy. to be implemented later */
#define EMUL_PIO_IDX_MAX 1U
struct vm_arch {
};
#endif /* RISCV_VM_H_ */