diff --git a/hypervisor/arch/riscv/Makefile b/hypervisor/arch/riscv/Makefile
index 6a1346229..5d9ff4803 100644
--- a/hypervisor/arch/riscv/Makefile
+++ b/hypervisor/arch/riscv/Makefile
@@ -19,6 +19,7 @@ LDFLAGS += -Wl,--no-warn-rwx-segments
 RV_ISA += gh
 RV_ISA += zbb
 RV_ISA += zicbom
+RV_ISA += zihintpause
 
 ARCH_CFLAGS += -march=rv64$(subst $() $(),_,$(RV_ISA))
 ARCH_CFLAGS += -mabi=lp64d
diff --git a/hypervisor/include/arch/riscv/asm/cpu.h b/hypervisor/include/arch/riscv/asm/cpu.h
index 72a4fa488..d499c0f28 100644
--- a/hypervisor/include/arch/riscv/asm/cpu.h
+++ b/hypervisor/include/arch/riscv/asm/cpu.h
@@ -46,6 +46,11 @@ static inline void arch_set_current_pcpu_id(uint16_t pcpu_id)
 	asm volatile ("mv tp, %0" : : "r" (pcpu_id) : "tp");
 }
 
+static inline void arch_asm_pause(void)
+{
+	asm volatile ("pause" ::: "memory");
+}
+
 /* Write CSR */
 #define cpu_csr_write(reg, csr_val)                                                                                    \
 	({                                                                                                             \