hv: extend struct pi_desc to support VT-d posted interrupts

For CPU side posted interrupts, it only uses bit 0 (ON) of the PI's 64-bit control
, other bits are don't care. This is not the case for VT-d posted
interrupts, define more bit fields for the PI's 64-bit control.
Use bitmap functions to manipulate the bit fields atomically.

Some MISRA-C violation and coding style fixes

Tracked-On: #4506
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@Intel.com>
This commit is contained in:
dongshen
2020-03-18 14:31:18 -07:00
committed by wenlingz
parent 8f732f2809
commit 0f3c876a91
3 changed files with 44 additions and 15 deletions

View File

@@ -378,10 +378,33 @@
struct pi_desc {
/* Posted Interrupt Requests, one bit per requested vector */
uint64_t pir[4];
uint64_t pending;
uint32_t unused[3];
union {
struct {
/* Outstanding Notification */
uint16_t on:1;
/* Suppress Notification, of non-urgent interrupts */
uint16_t sn:1;
uint16_t rsvd_1:14;
/* Notification Vector */
uint8_t nv;
uint8_t rsvd_2;
/* Notification destination, a physical LAPIC ID */
uint32_t ndst;
} bits;
uint64_t value;
} control;
uint32_t rsvd[6];
} __aligned(64);
/* External Interfaces */
void vmx_on(void);
void vmx_off(void);
@@ -408,4 +431,5 @@ void exec_vmwrite64(uint32_t field_full, uint64_t value);
void exec_vmclear(void *addr);
void exec_vmptrld(void *addr);
#define POSTED_INTR_ON 0U
#endif /* VMX_H_ */