From 0f5ccab68e6681c55f0a2a9c154a76be4a349eb2 Mon Sep 17 00:00:00 2001
From: Yuan Liu <yuan1.liu@intel.com>
Date: Thu, 6 Aug 2020 20:01:22 +0800
Subject: [PATCH] hv: code cleanup for vBAR writing

This patch introduces vpci_update_one_vbar API to simplify
vBAR mapping/unmapping when vBAR writing.

v2: refine commit message

v4: refine commit message

Tracked-On: #4853

Signed-off-by: Yuan Liu <yuan1.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
---
 hypervisor/dm/vpci/pci_pt.c    | 23 ++---------------------
 hypervisor/dm/vpci/vpci.c      | 20 ++++++++++++++++++++
 hypervisor/dm/vpci/vpci_priv.h |  4 ++++
 3 files changed, 26 insertions(+), 21 deletions(-)

diff --git a/hypervisor/dm/vpci/pci_pt.c b/hypervisor/dm/vpci/pci_pt.c
index 73966826c..f95946a6f 100644
--- a/hypervisor/dm/vpci/pci_pt.c
+++ b/hypervisor/dm/vpci/pci_pt.c
@@ -170,20 +170,11 @@ static void vdev_pt_deny_io_vbar(struct pci_vdev *vdev, uint32_t idx)
  */
 void vdev_pt_write_vbar(struct pci_vdev *vdev, uint32_t idx, uint32_t val)
 {
-	uint32_t update_idx = idx;
-	uint32_t offset = pci_bar_offset(idx);
 	struct pci_vbar *vbar = &vdev->vbars[idx];
 
 	switch (vbar->type) {
 	case PCIBAR_IO_SPACE:
-		vdev_pt_deny_io_vbar(vdev, update_idx);
-		if (val != ~0U) {
-			pci_vdev_write_vbar(vdev, idx, val);
-			vdev_pt_allow_io_vbar(vdev, update_idx);
-		} else {
-			pci_vdev_write_vcfg(vdev, offset, 4U, val);
-			vdev->vbars[update_idx].base_gpa = 0UL;
-		}
+		vpci_update_one_vbar(vdev, idx, val, vdev_pt_allow_io_vbar, vdev_pt_deny_io_vbar);
 		break;
 
 	case PCIBAR_NONE:
@@ -191,17 +182,7 @@ void vdev_pt_write_vbar(struct pci_vdev *vdev, uint32_t idx, uint32_t val)
 		break;
 
 	default:
-		if (vbar->type == PCIBAR_MEM64HI) {
-			update_idx -= 1U;
-		}
-		vdev_pt_unmap_mem_vbar(vdev, update_idx);
-		if (val != ~0U) {
-			pci_vdev_write_vbar(vdev, idx, val);
-			vdev_pt_map_mem_vbar(vdev, update_idx);
-		} else {
-			pci_vdev_write_vcfg(vdev, offset, 4U, val);
-			vdev->vbars[update_idx].base_gpa = 0UL;
-		}
+		vpci_update_one_vbar(vdev, idx, val, vdev_pt_map_mem_vbar, vdev_pt_unmap_mem_vbar);
 		break;
 	}
 }
diff --git a/hypervisor/dm/vpci/vpci.c b/hypervisor/dm/vpci/vpci.c
index 75154fb40..ed0f6b8c8 100644
--- a/hypervisor/dm/vpci/vpci.c
+++ b/hypervisor/dm/vpci/vpci.c
@@ -765,3 +765,23 @@ int32_t vpci_deassign_pcidev(struct acrn_vm *tgt_vm, struct acrn_assign_pcidev *
 
 	return ret;
 }
+
+void vpci_update_one_vbar(struct pci_vdev *vdev, uint32_t bar_idx, uint32_t val,
+		map_pcibar map_cb, unmap_pcibar unmap_cb)
+{
+	struct pci_vbar *vbar = &vdev->vbars[bar_idx];
+	uint32_t offset = pci_bar_offset(bar_idx);
+	uint32_t update_idx = bar_idx;
+
+	if (vbar->type == PCIBAR_MEM64HI) {
+		update_idx -= 1U;
+	}
+	unmap_cb(vdev, update_idx);
+	if (val != ~0U) {
+		pci_vdev_write_vbar(vdev, bar_idx, val);
+		map_cb(vdev, update_idx);
+	} else {
+		pci_vdev_write_vcfg(vdev, offset, 4U, val);
+		vdev->vbars[update_idx].base_gpa = 0UL;
+	}
+}
diff --git a/hypervisor/dm/vpci/vpci_priv.h b/hypervisor/dm/vpci/vpci_priv.h
index 9e7e8fb60..cf55622d3 100644
--- a/hypervisor/dm/vpci/vpci_priv.h
+++ b/hypervisor/dm/vpci/vpci_priv.h
@@ -158,4 +158,8 @@ uint32_t pci_vdev_read_vbar(const struct pci_vdev *vdev, uint32_t idx);
 void pci_vdev_write_vbar(struct pci_vdev *vdev, uint32_t idx, uint32_t val);
 
 void vdev_pt_hide_sriov_cap(struct pci_vdev *vdev);
+
+typedef void (*map_pcibar)(struct pci_vdev *vdev, uint32_t bar_idx);
+typedef void (*unmap_pcibar)(struct pci_vdev *vdev, uint32_t bar_idx);
+void vpci_update_one_vbar(struct pci_vdev *vdev, uint32_t bar_idx, uint32_t val, map_pcibar map_cb, unmap_pcibar unmap_cb);
 #endif /* VPCI_PRIV_H_ */