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dm: ptct: reserve e820 table

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Reserve e820 Table for PTCT. Now for OVMF, we need do the reserve in OVMF.

Tracked-On: #5330

Signed-off-by: Qian Wang <qian1.wang@intel.com>
Signed-off-by: Li Fei1 <fei1.li@intel.com>
This commit is contained in:
Qian Wang 2020-09-16 12:20:18 +08:00 committed by wenlingz
parent c9d6565798
commit 0f6d33c479
3 changed files with 43 additions and 15 deletions
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35
devicemodel/core/sw_load_common.c
View File

@ -34,6 +34,7 @@
#include "sw_load.h"
#include "dm.h"
#include "pci_core.h"
#include "ptct.h"
int with_bootargs;
static char bootargs[BOOT_ARG_LEN];
@ -77,10 +78,16 @@ const struct e820_entry e820_default_entries[NUM_E820_ENTRIES] = {
{ /* 1MB to lowmem */
.baseaddr = 0x100000,
.length = 0x48f00000,
.length = 0x3ff00000,
.type = E820_TYPE_RAM
},
{ /* PTCT */
.baseaddr = PSRAM_BASE_GPA,
.length = PSRAM_MAX_SIZE,
.type = E820_TYPE_RESERVED
},
{ /* lowmem to lowmem_limit */
.baseaddr = 0x49000000,
.length = 0x37000000,
@ -245,19 +252,23 @@ acrn_create_e820_table(struct vmctx *ctx, struct e820_entry *e820)
uint32_t removed = 0, k;
memcpy(e820, e820_default_entries, sizeof(e820_default_entries));
e820[LOWRAM_E820_ENTRY].length = ctx->lowmem -
e820[LOWRAM_E820_ENTRY].baseaddr;
if (!pt_ptct) {
e820[LOWRAM_E820_ENTRY].length = ctx->lowmem -
e820[LOWRAM_E820_ENTRY].baseaddr;
/* remove [lowmem, lowmem_limit) if it's empty */
if (ctx->lowmem_limit > ctx->lowmem) {
e820[LOWRAM_E820_ENTRY+1].baseaddr = ctx->lowmem;
e820[LOWRAM_E820_ENTRY+1].length =
ctx->lowmem_limit - ctx->lowmem;
/* remove [lowmem, lowmem_limit) if it's empty */
if (ctx->lowmem_limit > ctx->lowmem) {
e820[LOWRAM_E820_ENTRY+1].baseaddr = ctx->lowmem;
e820[LOWRAM_E820_ENTRY+1].length =
ctx->lowmem_limit - ctx->lowmem;
} else {
memmove(&e820[LOWRAM_E820_ENTRY+1], &e820[LOWRAM_E820_ENTRY+2],
sizeof(e820[LOWRAM_E820_ENTRY+2]) *
(NUM_E820_ENTRIES - (LOWRAM_E820_ENTRY+2)));
removed++;
}
} else {
memmove(&e820[LOWRAM_E820_ENTRY+1], &e820[LOWRAM_E820_ENTRY+2],
sizeof(e820[LOWRAM_E820_ENTRY+2]) *
(NUM_E820_ENTRIES - (LOWRAM_E820_ENTRY+2)));
removed++;
e820[LOWRAM_E820_ENTRY+2].type = E820_TYPE_RAM;
}
/* remove [5GB, highmem) if it's empty */

19
devicemodel/hw/platform/acpi/acpi.c
View File

@ -50,6 +50,8 @@
* DSDT -> 0xf2800 (variable - can go up to 0x100000)
*/
#include <sys/ioctl.h>
#include <sys/mman.h>
#include <sys/param.h>
#include <sys/stat.h>
#include <errno.h>
@ -69,6 +71,9 @@
#include "vmmapi.h"
#include "hpet.h"
#include "log.h"
#include "ptct.h"
#include "vhm_ioctl_defs.h"
#include "vmmapi.h"
/*
* Define the base address of the ACPI tables, and the offsets to
@ -1084,6 +1089,16 @@ int create_and_inject_vptct(struct vmctx *ctx)
size_t native_ptct_len;
size_t vptct_len;
uint8_t buf[PTCT_BUF_LEN] = {0};
struct vm_memmap memmap = {
.type = VM_MMIO,
.gpa = PSRAM_BASE_GPA,
.hpa = PSRAM_BASE_HPA,
/* TODO: the .len should be set as the psram_size passed-in via the DM argument "psram <psram_size>"*/
.len = 0x208000UL,
.prot = PROT_ALL
};
native_ptct_fd = open(PTCT_NATIVE_FILE_PATH_IN_SOS, O_RDONLY);
if (native_ptct_fd < 0){
@ -1107,7 +1122,9 @@ int create_and_inject_vptct(struct vmctx *ctx)
vptct_len = native_ptct_len;
memcpy(vm_map_gpa(ctx, ACPI_BASE + PTCT_OFFSET, vptct_len), buf, vptct_len);
return 0;
ioctl(ctx->fd, IC_UNSET_MEMSEG, &memmap);
return ioctl(ctx->fd, IC_SET_MEMSEG, &memmap);
};
void

4
devicemodel/include/sw_load.h
View File

@ -39,9 +39,9 @@
#define E820_TYPE_ACPI_NVS 4U /* EFI 10 */
#define E820_TYPE_UNUSABLE 5U /* EFI 8 */
#define NUM_E820_ENTRIES 10
#define NUM_E820_ENTRIES 11
#define LOWRAM_E820_ENTRY 2
#define HIGHRAM_E820_ENTRY 9
#define HIGHRAM_E820_ENTRY 10
/* Defines a single entry in an E820 memory map. */
struct e820_entry {