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HV:CPU:Constant values replace with CPU MACRO

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MISRA C requires that all unsigned constants should have
the suffix 'U/UL'(e.g. 0xffU), but the assembler may not
accept such C-style constants.

To work this around, all  unsigned constants must be
explicitly spells out in assembly with a comment tracking
the original expression from which the magic number is
calculated.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
This commit is contained in:
Xiangyang Wu
2018-07-06 13:05:10 +08:00
committed by wenlingz
parent 54bd55d636
commit 0f6ff87835
3 changed files with 221 additions and 110 deletions
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50
hypervisor/include/arch/x86/guest/vcpu.h
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@@ -32,45 +32,45 @@
#define CPU_CONTEXT_INDEX_R15 13
#define CPU_CONTEXT_INDEX_RDI 14
#define CPU_CONTEXT_OFFSET_RAX 0
#define CPU_CONTEXT_OFFSET_RBX 8
#define CPU_CONTEXT_OFFSET_RCX 16
#define CPU_CONTEXT_OFFSET_RDX 24
#define CPU_CONTEXT_OFFSET_RBP 32
#define CPU_CONTEXT_OFFSET_RSI 40
#define CPU_CONTEXT_OFFSET_R8 48
#define CPU_CONTEXT_OFFSET_R9 56
#define CPU_CONTEXT_OFFSET_R10 64
#define CPU_CONTEXT_OFFSET_R11 72
#define CPU_CONTEXT_OFFSET_R12 80
#define CPU_CONTEXT_OFFSET_R13 88
#define CPU_CONTEXT_OFFSET_R14 96
#define CPU_CONTEXT_OFFSET_R15 104
#define CPU_CONTEXT_OFFSET_RDI 112
#define CPU_CONTEXT_OFFSET_CR0 120
#define CPU_CONTEXT_OFFSET_CR2 128
#define CPU_CONTEXT_OFFSET_CR3 136
#define CPU_CONTEXT_OFFSET_CR4 144
#define CPU_CONTEXT_OFFSET_RAX 0U
#define CPU_CONTEXT_OFFSET_RBX 8U
#define CPU_CONTEXT_OFFSET_RCX 16U
#define CPU_CONTEXT_OFFSET_RDX 24U
#define CPU_CONTEXT_OFFSET_RBP 32U
#define CPU_CONTEXT_OFFSET_RSI 40U
#define CPU_CONTEXT_OFFSET_R8 48U
#define CPU_CONTEXT_OFFSET_R9 56U
#define CPU_CONTEXT_OFFSET_R10 64U
#define CPU_CONTEXT_OFFSET_R11 72U
#define CPU_CONTEXT_OFFSET_R12 80U
#define CPU_CONTEXT_OFFSET_R13 88U
#define CPU_CONTEXT_OFFSET_R14 96U
#define CPU_CONTEXT_OFFSET_R15 104U
#define CPU_CONTEXT_OFFSET_RDI 112U
#define CPU_CONTEXT_OFFSET_CR0 120U
#define CPU_CONTEXT_OFFSET_RIP 152
#define CPU_CONTEXT_OFFSET_RSP 160
#define CPU_CONTEXT_OFFSET_RFLAGS 168
#define CPU_CONTEXT_OFFSET_TSC_OFFSET 184
#define CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL 192
#define CPU_CONTEXT_OFFSET_IA32_STAR 200
#define CPU_CONTEXT_OFFSET_IA32_LSTAR 208
#define CPU_CONTEXT_OFFSET_IA32_FMASK 216
#define CPU_CONTEXT_OFFSET_IA32_KERNEL_GS_BASE 224
#define CPU_CONTEXT_OFFSET_CS 280
#define CPU_CONTEXT_OFFSET_SS 312
#define CPU_CONTEXT_OFFSET_DS 344
#define CPU_CONTEXT_OFFSET_ES 376
#define CPU_CONTEXT_OFFSET_FS 408
#define CPU_CONTEXT_OFFSET_GS 440
#define CPU_CONTEXT_OFFSET_TR 472
#define CPU_CONTEXT_OFFSET_IDTR 504
#define CPU_CONTEXT_OFFSET_LDTR 536
#define CPU_CONTEXT_OFFSET_GDTR 568
#define CPU_CONTEXT_OFFSET_FXSTORE_GUEST_AREA 608
#define CPU_CONTEXT_OFFSET_CR2 128U
#define CPU_CONTEXT_OFFSET_CR3 136U
#define CPU_CONTEXT_OFFSET_CR4 144U
#define CPU_CONTEXT_OFFSET_RSP 160U
#define CPU_CONTEXT_OFFSET_RFLAGS 168U
#define CPU_CONTEXT_OFFSET_IA32_SPEC_CTRL 192U
#define CPU_CONTEXT_OFFSET_SS 312U
#define CPU_CONTEXT_OFFSET_IDTR 504U
#define CPU_CONTEXT_OFFSET_LDTR 536U
/*sizes of various registers within the VCPU data structure */
#define VMX_CPU_S_FXSAVE_GUEST_AREA_SIZE GUEST_STATE_AREA_SIZE