diff --git a/hypervisor/arch/x86/cpu.c b/hypervisor/arch/x86/cpu.c
index 63343a23c..6ffd196e6 100644
--- a/hypervisor/arch/x86/cpu.c
+++ b/hypervisor/arch/x86/cpu.c
@@ -87,7 +87,7 @@ static inline bool get_monitor_cap(void)
 		 * in hypervisor, but still expose it to the guests and
 		 * let them handle it correctly
 		 */
-		if (boot_cpu_data.x86 != 0x6U || boot_cpu_data.x86_model != 0x5cU)
+		if (boot_cpu_data.family != 0x6U || boot_cpu_data.model != 0x5cU)
 			return true;
 	}
 
@@ -114,12 +114,12 @@ static void get_cpu_capabilities(void)
 	family = (eax >> 8U) & 0xffU;
 	if (family == 0xFU)
 		family += (eax >> 20U) & 0xffU;
-	boot_cpu_data.x86 = (uint8_t)family;
+	boot_cpu_data.family = (uint8_t)family;
 
 	model = (eax >> 4U) & 0xfU;
 	if (family >= 0x06U)
 		model += ((eax >> 16U) & 0xfU) << 4U;
-	boot_cpu_data.x86_model = (uint8_t)model;
+	boot_cpu_data.model = (uint8_t)model;
 
 
 	cpuid(CPUID_EXTEND_FEATURE, &unused,
@@ -144,10 +144,10 @@ static void get_cpu_capabilities(void)
 			/* EAX bits 07-00: #Physical Address Bits
 			 *     bits 15-08: #Linear Address Bits
 			 */
-			boot_cpu_data.x86_virt_bits = (uint8_t)((eax >> 8U) & 0xffU);
-			boot_cpu_data.x86_phys_bits = (uint8_t)(eax & 0xffU);
+			boot_cpu_data.virt_bits = (uint8_t)((eax >> 8U) & 0xffU);
+			boot_cpu_data.phys_bits = (uint8_t)(eax & 0xffU);
 			boot_cpu_data.physical_address_mask =
-				get_address_mask(boot_cpu_data.x86_phys_bits);
+				get_address_mask(boot_cpu_data.phys_bits);
 	}
 
 	/* For speculation defence.
@@ -188,8 +188,8 @@ static int hardware_detect_support(void)
 		pr_fatal("%s, LM not supported\n", __func__);
 		return -ENODEV;
 	}
-	if ((boot_cpu_data.x86_phys_bits == 0U) ||
-		(boot_cpu_data.x86_virt_bits == 0U)) {
+	if ((boot_cpu_data.phys_bits == 0U) ||
+		(boot_cpu_data.virt_bits == 0U)) {
 		pr_fatal("%s, can't detect Linear/Physical Address size\n",
 			__func__);
 		return -ENODEV;
diff --git a/hypervisor/arch/x86/guest/pm.c b/hypervisor/arch/x86/guest/pm.c
index 6eec47d12..50109bb4b 100644
--- a/hypervisor/arch/x86/guest/pm.c
+++ b/hypervisor/arch/x86/guest/pm.c
@@ -111,8 +111,8 @@ void vm_setup_cpu_state(struct vm *vm)
  */
 int vm_load_pm_s_state(struct vm *vm)
 {
-	if ((boot_cpu_data.x86 == host_acpi_info.x86_family)
-		&& (boot_cpu_data.x86_model == host_acpi_info.x86_model)) {
+	if ((boot_cpu_data.family == host_acpi_info.x86_family)
+		&& (boot_cpu_data.model == host_acpi_info.x86_model)) {
 		vm->pm.sx_state_data = (struct pm_s_state_data *)
 						&host_acpi_info.pm_s_state;
 		pr_info("System S3/S5 is supported.");
diff --git a/hypervisor/arch/x86/lapic.c b/hypervisor/arch/x86/lapic.c
index 86dbe2cd5..45c6e295f 100644
--- a/hypervisor/arch/x86/lapic.c
+++ b/hypervisor/arch/x86/lapic.c
@@ -386,7 +386,7 @@ send_startup_ipi(enum intr_cpu_startup_shorthand cpu_startup_shorthand,
 	/* Give 10ms for INIT sequence to complete for old processors.
 	 * Modern processors (family == 6) don't need to wait here.
 	 */
-	if (boot_cpu_data.x86 != 6)
+	if (boot_cpu_data.family != 6)
 		mdelay(10);
 
 	/* De-assert INIT IPI */
@@ -404,7 +404,7 @@ send_startup_ipi(enum intr_cpu_startup_shorthand cpu_startup_shorthand,
 	write_lapic_reg32(LAPIC_INT_COMMAND_REGISTER_0, icr.value_32.lo_32);
 	wait_for_delivery();
 
-	if (boot_cpu_data.x86 == 6) /* 10us is enough for Modern processors */
+	if (boot_cpu_data.family == 6) /* 10us is enough for Modern processors */
 		udelay(10);
 	else /* 200us for old processors */
 		udelay(200);
diff --git a/hypervisor/include/arch/x86/cpu.h b/hypervisor/include/arch/x86/cpu.h
index ab1f6078e..f2a35d0f5 100644
--- a/hypervisor/include/arch/x86/cpu.h
+++ b/hypervisor/include/arch/x86/cpu.h
@@ -237,9 +237,9 @@ struct cpu_state_info {
 };
 
 struct cpuinfo_x86 {
-	uint8_t x86, x86_model;
-	uint8_t x86_virt_bits;
-	uint8_t x86_phys_bits;
+	uint8_t family, model;
+	uint8_t virt_bits;
+	uint8_t phys_bits;
 	uint32_t cpuid_level;
 	uint32_t extended_cpuid_level;
 	uint64_t physical_address_mask;