From 1303861d26dcd5f3a3073b564a7c25e037d93b93 Mon Sep 17 00:00:00 2001
From: Junming Liu <junming.liu@intel.com>
Date: Sat, 15 Feb 2020 16:33:07 +0000
Subject: [PATCH] hv:enable gpu iommu except APL platforms

To enable gvt-d,need to allow the GPU IOMMU.
While gvt-d hasn't been enabled on APL yet,
so let APL disable GPU IOMMU.

v2 -> v3:
        * let APL platforms disable GPU IOMMU.

Tracked-On: #4405

Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Wu Binbin <binbin.wu@intel.com>
---
 hypervisor/acpi_parser/dmar_parse.c    | 14 +++++++++-----
 hypervisor/arch/x86/cpu_caps.c         | 11 +++++++++++
 hypervisor/include/arch/x86/cpu_caps.h |  1 +
 3 files changed, 21 insertions(+), 5 deletions(-)

diff --git a/hypervisor/acpi_parser/dmar_parse.c b/hypervisor/acpi_parser/dmar_parse.c
index e3d5203f7..41f746d9c 100644
--- a/hypervisor/acpi_parser/dmar_parse.c
+++ b/hypervisor/acpi_parser/dmar_parse.c
@@ -8,6 +8,7 @@
 #include <logmsg.h>
 #include <io.h>
 #include <spinlock.h>
+#include <cpu_caps.h>
 #include "pci.h"
 #include "vtd.h"
 #include "acpi.h"
@@ -204,11 +205,14 @@ handle_one_drhd(struct acpi_dmar_hardware_unit *acpi_drhd,
 
 		consumed = handle_dmar_devscope(dev_scope, cp, remaining);
 
-		if (((drhd->segment << 16U) |
-		     (dev_scope->bus << 8U) |
-		     dev_scope->devfun) == CONFIG_GPU_SBDF) {
-			ASSERT(dev_count == 1, "no dedicated iommu for gpu");
-			drhd->ignore = true;
+		/* Disable GPU IOMMU due to gvt-d hasn’t been enabled on APL yet. */
+		if (is_apl_platform()) {
+			if (((drhd->segment << 16U) |
+		     	     (dev_scope->bus << 8U) |
+		     	     dev_scope->devfun) == CONFIG_GPU_SBDF) {
+				ASSERT(dev_count == 1, "no dedicated iommu for gpu");
+				drhd->ignore = true;
+			}
 		}
 
 		if (consumed <= 0)
diff --git a/hypervisor/arch/x86/cpu_caps.c b/hypervisor/arch/x86/cpu_caps.c
index 93b2b67e9..33e311ed8 100644
--- a/hypervisor/arch/x86/cpu_caps.c
+++ b/hypervisor/arch/x86/cpu_caps.c
@@ -113,6 +113,17 @@ static bool is_ctrl_setting_allowed(uint64_t msr_val, uint32_t ctrl)
 	return ((((uint32_t)(msr_val >> 32UL)) & ctrl) == ctrl);
 }
 
+bool is_apl_platform(void)
+{
+	bool ret = false;
+
+	if ((boot_cpu_data.family == 0x6U) && (boot_cpu_data.model == 0x92U)) {
+		ret = true;
+	}
+
+	return ret;
+}
+
 static void detect_ept_cap(void)
 {
 	uint64_t msr_val;
diff --git a/hypervisor/include/arch/x86/cpu_caps.h b/hypervisor/include/arch/x86/cpu_caps.h
index 49bd321b5..3f650ac8b 100644
--- a/hypervisor/include/arch/x86/cpu_caps.h
+++ b/hypervisor/include/arch/x86/cpu_caps.h
@@ -48,6 +48,7 @@ bool is_apicv_advanced_feature_supported(void);
 bool pcpu_has_cap(uint32_t bit);
 bool pcpu_has_vmx_ept_cap(uint32_t bit_mask);
 bool pcpu_has_vmx_vpid_cap(uint32_t bit_mask);
+bool is_apl_platform(void);
 void init_pcpu_capabilities(void);
 void init_pcpu_model_name(void);
 int32_t detect_hardware_support(void);