hv: change cpu configuration from 1:3 to 2:2

Signed-off-by: Fei Jiang <fei.jiang@intel.com>
This commit is contained in:
Fei Jiang 2018-07-12 16:24:56 +08:00 committed by Yakui Zhao
parent 93001a2a4d
commit 13850f5327
3 changed files with 5 additions and 5 deletions

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@ -1 +1 @@
pci_devices_ignore=(0:18:2) maxcpus=1 console=tty0 console=ttyS0 i915.nuclear_pageflip=1 root=/dev/mmcblk1p1 rw rootwait quiet loglevel=3 no_timer_check consoleblank=0 i915.enable_initial_modeset=1 i915.tsd_init=7 i915.tsd_delay=2000 video=DP-1:d video=DP-2:d video=HDMI-A-1:e video=HDMI-A-2:e i915.avail_planes_per_pipe=0x01010F i915.domain_plane_owners=0x011111110000 i915.enable_guc_loading=0 i915.enable_guc_submission=0 i915.enable_preemption=1 i915.context_priority_mode=2 i915.enable_gvt=1 hvlog=2M@0x6de00000
pci_devices_ignore=(0:18:2) maxcpus=2 console=tty0 console=ttyS0 i915.nuclear_pageflip=1 root=/dev/mmcblk1p1 rw rootwait quiet loglevel=3 no_timer_check consoleblank=0 i915.enable_initial_modeset=1 i915.tsd_init=7 i915.tsd_delay=2000 video=DP-1:d video=DP-2:d video=HDMI-A-1:e video=HDMI-A-2:e i915.avail_planes_per_pipe=0x01010F i915.domain_plane_owners=0x011111110000 i915.enable_guc_loading=0 i915.enable_guc_submission=0 i915.enable_preemption=1 i915.context_priority_mode=2 i915.enable_gvt=1 hvlog=2M@0x6de00000

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@ -7,10 +7,10 @@
#include <hypervisor.h>
/* Number of CPUs in VM0 */
#define VM0_NUM_CPUS 1
#define VM0_NUM_CPUS 2
/* Logical CPU IDs assigned to VM0 */
int VM0_CPUS[VM0_NUM_CPUS] = {0};
int VM0_CPUS[VM0_NUM_CPUS] = {0, 1};
struct vm_description vm0_desc = {
.vm_hw_num_cores = VM0_NUM_CPUS,

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@ -7,10 +7,10 @@
#include <hypervisor.h>
/* Number of CPUs in VM0 */
#define VM0_NUM_CPUS 1
#define VM0_NUM_CPUS 2
/* Logical CPU IDs assigned to VM0 */
int VM0_CPUS[VM0_NUM_CPUS] = {0};
int VM0_CPUS[VM0_NUM_CPUS] = {0, 1};
struct vm_description vm0_desc = {
.vm_hw_num_cores = VM0_NUM_CPUS,