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hv: vPCI: passthrough MSI-X Control Register to guest.

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In spite of Table Size in MSI-X Message Control Register [Bits 10:0] masks as
RO (Register bits are read-only and cannot be altered by software), In Spec
PCIe 6.0, Chap 6.1.4.2 MSI-X Configuration "Depending upon system software
policy, system software, device driver software, or each at different times or
environments may configure a Function’s MSI-X Capability and table structures
with suitable vectors."

This patch just pass through MSI-X Control Register field to guest.

Tracked-On: #7275
Signed-off-by: Fei Li <fei1.li@intel.com>
This commit is contained in:
Fei Li
2022-04-14 17:37:18 +08:00
committed by acrnsi-robot
parent e2f7b1fc51
commit 13e99bc0b9
10 changed files with 58 additions and 13 deletions
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2
hypervisor/dm/vpci/vhostbridge.c
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@@ -146,7 +146,7 @@ static void deinit_vhostbridge(__unused struct pci_vdev *vdev)
* @pre vdev != NULL
* @pre vdev->vpci != NULL
*/
static int32_t read_vhostbridge_cfg(const struct pci_vdev *vdev, uint32_t offset,
static int32_t read_vhostbridge_cfg(struct pci_vdev *vdev, uint32_t offset,
uint32_t bytes, uint32_t *val)
{
*val = pci_vdev_read_vcfg(vdev, offset, bytes);