From 140077f225b57a5ad325473c2ca1b18a80f44ef9 Mon Sep 17 00:00:00 2001
From: Sainath Grandhi <sainath.grandhi@intel.com>
Date: Thu, 2 Apr 2020 22:42:14 -0700
Subject: [PATCH] acrn-config: Fixes for BAR remapping logic

This patch does the following
1) Removes the limitation on BAR size for 1 GB
2) Align the BAR address to the BAR size

Tracked-On: #4586
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Terry Zou <terry.zou@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
---
 .../acrn-config/board_config/pci_devices_h.py | 19 ++++++-------------
 misc/acrn-config/library/board_cfg_lib.py     |  2 +-
 misc/acrn-config/library/common.py            |  2 +-
 3 files changed, 8 insertions(+), 15 deletions(-)

diff --git a/misc/acrn-config/board_config/pci_devices_h.py b/misc/acrn-config/board_config/pci_devices_h.py
index e02f6ad3f..d7e8f3f40 100644
--- a/misc/acrn-config/board_config/pci_devices_h.py
+++ b/misc/acrn-config/board_config/pci_devices_h.py
@@ -14,10 +14,6 @@ PCI_END_HEADER = r"""
 #endif /* PCI_DEVICES_H_ */"""
 
 
-MEM_ALIGN = 2 * board_cfg_lib.SIZE_M
-#TODO: Support 64Bit Bar for huge MMIO than HUGE_MMIO_LIMIT
-SUPPORT_HUGE_HI_MMIO = False
-HUGE_MMIO_LIMIT = board_cfg_lib.SIZE_2G / 2
 HI_MMIO_OFFSET = 0
 
 class Bar_Mem:
@@ -62,7 +58,9 @@ def get_size(line):
 
     # get size string from format, Region n: Memory at x ... [size=NK]
     size_str = line.split()[-1].strip(']').split('=')[1]
-    if 'M' in size_str:
+    if 'G' in size_str:
+        size = int(size_str.strip('G')) * board_cfg_lib.SIZE_G
+    elif 'M' in size_str:
         size = int(size_str.strip('M')) * board_cfg_lib.SIZE_M
     elif 'K' in size_str:
         size = int(size_str.strip('K')) * board_cfg_lib.SIZE_K
@@ -71,13 +69,13 @@ def get_size(line):
 
     return size
 
-
+# round up the running bar_addr to the size of the incoming bar "line"
 def remap_bar_addr_to_high(bar_addr, line):
     """Generate vbar address"""
     global HI_MMIO_OFFSET
-    cur_addr = board_cfg_lib.round_up(bar_addr, MEM_ALIGN)
     size = get_size(line)
-    HI_MMIO_OFFSET = board_cfg_lib.round_up(cur_addr + size, MEM_ALIGN)
+    cur_addr = board_cfg_lib.round_up(bar_addr, size)
+    HI_MMIO_OFFSET = cur_addr + size
     return cur_addr
 
 
@@ -105,11 +103,6 @@ def parser_pci():
             if bar_addr >= board_cfg_lib.SIZE_4G or bar_addr < board_cfg_lib.SIZE_2G:
                 if not tmp_bar_attr.remappable:
                     continue
-                #TODO: Support 64Bit Bar for huge MMIO than HUGE_MMIO_LIMIT
-                if not SUPPORT_HUGE_HI_MMIO and get_size(line) >=  HUGE_MMIO_LIMIT:
-                    tmp_bar_attr.remappable = False
-                    PCI_DEV_BAR_DESC.pci_dev_dic[pci_bdf] = tmp_bar_attr
-                    continue
 
                 bar_addr = remap_bar_addr_to_high(HI_MMIO_OFFSET, line)
                 tmp_bar_mem.remapped = True
diff --git a/misc/acrn-config/library/board_cfg_lib.py b/misc/acrn-config/library/board_cfg_lib.py
index adb685e28..33a21f3b2 100644
--- a/misc/acrn-config/library/board_cfg_lib.py
+++ b/misc/acrn-config/library/board_cfg_lib.py
@@ -43,7 +43,7 @@ SIZE_K = common.SIZE_K
 SIZE_M = common.SIZE_M
 SIZE_2G = common.SIZE_2G
 SIZE_4G = common.SIZE_4G
-
+SIZE_G = common.SIZE_G
 
 def prepare():
     """ check environment """
diff --git a/misc/acrn-config/library/common.py b/misc/acrn-config/library/common.py
index 350f42c34..415712270 100644
--- a/misc/acrn-config/library/common.py
+++ b/misc/acrn-config/library/common.py
@@ -29,7 +29,7 @@ SIZE_K = 1024
 SIZE_M = SIZE_K * 1024
 SIZE_2G = 2 * SIZE_M * SIZE_K
 SIZE_4G = 2 * SIZE_2G
-
+SIZE_G = SIZE_M * 1024
 
 class MultiItem():