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hv: keylocker: Add CR4 bit CR4_KL as CR4_TRAP_AND_PASSTHRU_BITS
Bit19 (CR4_KL) of CR4 is CPU KeyLocker feature enable bit. Hypervisor traps the bit's writing to track the keylocker feature on/off of guest. While the bit is set by guest, - set cr4_kl_enabled to indicate the vcpu's keylocker feature enabled status - load vcpu's IWKey in host (will add in later patch) While the bit is clear by guest, - clear cr4_kl_enabled This patch trap and passthru the CR4_KL bit to guest for operation. Tracked-On: #5695 Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@@ -54,7 +54,7 @@
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CR4_UMIP | CR4_LA57)
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static uint64_t cr4_passthru_mask = CR4_PASSTHRU_BITS; /* bound to flexible bits */
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#define CR4_TRAP_AND_PASSTHRU_BITS (CR4_PSE | CR4_PAE | CR4_SMEP | CR4_SMAP | CR4_PKE | CR4_PKS)
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#define CR4_TRAP_AND_PASSTHRU_BITS (CR4_PSE | CR4_PAE | CR4_SMEP | CR4_SMAP | CR4_PKE | CR4_PKS | CR4_KL)
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static uint64_t cr4_trap_and_passthru_mask = CR4_TRAP_AND_PASSTHRU_BITS; /* bound to flexible bits */
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#define CR4_TRAP_AND_EMULATE_BITS CR4_MCE /* software emulated bits even if host is fixed */
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@@ -388,6 +388,14 @@ static void vmx_write_cr4(struct acrn_vcpu *vcpu, uint64_t cr4)
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}
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}
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if (!err_found && ((cr4_changed_bits & CR4_KL) != 0UL)) {
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if ((cr4 & CR4_KL) != 0UL) {
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vcpu->arch.cr4_kl_enabled = true;
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} else {
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vcpu->arch.cr4_kl_enabled = false;
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}
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}
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if (!err_found) {
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/*
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* Update the passthru bits.
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