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hv: keylocker: Add CR4 bit CR4_KL as CR4_TRAP_AND_PASSTHRU_BITS
Bit19 (CR4_KL) of CR4 is CPU KeyLocker feature enable bit. Hypervisor traps the bit's writing to track the keylocker feature on/off of guest. While the bit is set by guest, - set cr4_kl_enabled to indicate the vcpu's keylocker feature enabled status - load vcpu's IWKey in host (will add in later patch) While the bit is clear by guest, - clear cr4_kl_enabled This patch trap and passthru the CR4_KL bit to guest for operation. Tracked-On: #5695 Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@@ -80,8 +80,9 @@
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#define CR4_SMXE (1UL<<14U) /* SMX enable */
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#define CR4_FSGSBASE (1UL<<16U) /* RD(FS|GS|FS)BASE inst */
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#define CR4_PCIDE (1UL<<17U) /* PCID enable */
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#define CR4_OSXSAVE (1UL<<18U)
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/* XSAVE and Processor Extended States enable bit */
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#define CR4_OSXSAVE (1UL<<18U)
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#define CR4_KL (1UL<<19U) /* KeyLocker enable */
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#define CR4_SMEP (1UL<<20U)
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#define CR4_SMAP (1UL<<21U)
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#define CR4_PKE (1UL<<22U) /* Protect-key-enable */
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@@ -259,6 +259,9 @@ struct acrn_vcpu_arch {
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/* EOI_EXIT_BITMAP buffer, for the bitmap update */
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uint64_t eoi_exit_bitmap[EOI_EXIT_BITMAP_SIZE >> 6U];
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/* Keylocker */
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bool cr4_kl_enabled;
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} __aligned(PAGE_SIZE);
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struct acrn_vm;
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