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hv: vcpuid: present sgx capabilities to guest

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If sgx is supported in guest, present SGX capabilities to guest.
There will be only one EPC section presented to guest, even if EPC
memory for a guest is from muiltiple physcial EPC sections.

Tracked-On: #3179
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Binbin Wu
2019-05-22 15:30:05 +08:00
committed by ACRN System Integration
parent 65d437283e
commit 1724996bc5
2 changed files with 89 additions and 29 deletions
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10
hypervisor/include/arch/x86/cpuid.h
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@@ -97,11 +97,15 @@
/* CPUID.01H:ECX.PCID*/
#define CPUID_ECX_PCID (1U<<17U)
/* CPUID.0DH.EAX.XCR0_BNDREGS */
#define CPUID_EAX_XCR0_BNDREGS (1U<<3U)
#define CPUID_EAX_XCR0_BNDREGS (1U<<3U)
/* CPUID.0DH.EAX.XCR0_BNDCSR */
#define CPUID_EAX_XCR0_BNDCSR (1U<<4U)
#define CPUID_EAX_XCR0_BNDCSR (1U<<4U)
/* CPUID.12H.EAX.SGX1 */
#define CPUID_EAX_SGX1 (1U<<0U)
/* CPUID.12H.EAX.SGX2 */
#define CPUID_EAX_SGX2 (1U<<1U)
/* CPUID.80000001H.EDX.XD_BIT_AVAILABLE */
#define CPUID_EDX_XD_BIT_AVIL (1U<<20U)
#define CPUID_EDX_XD_BIT_AVIL (1U<<20U)
/* CPUID source operands */
#define CPUID_VENDORSTRING 0U