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HV:Treewide:Update the type of vcpu id as uint16_t

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In the hypervisor, virtual cpu id is defined as "int" or "uint32_t"
type in the hypervisor. So there are some sign conversion issues
about virtual cpu id (vcpu_id) reported by static analysis tool.
Sign conversion violates the rules of MISRA C:2012.

BTW, virtual cpu id has different names (vcpu_id, cpu_id, logical_id)
 for different modules of HV, its type is defined as "int" or "uint32_t"
in the HV. cpu_id type and logical_id type clean up will be done in
other patchs.

V1-->V2:
         More clean up the type of vcpu id;
         "%hu" is for vcpu id in the print function.

Signed-off-by: Xiangyang Wu <xiangyang.wu@intel.com>
This commit is contained in:
Xiangyang Wu
2018-07-03 16:41:54 +08:00
committed by lijinxia
parent b3fa2efe56
commit 188210ab03
14 changed files with 54 additions and 45 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
hypervisor/arch/x86/guest/guest.c
View File

@@ -34,7 +34,7 @@ is_vm0(struct vm *vm)
return (vm->attr.boot_idx & 0x7FU) == 0;
}
inline struct vcpu *vcpu_from_vid(struct vm *vm, int vcpu_id)
inline struct vcpu *vcpu_from_vid(struct vm *vm, uint16_t vcpu_id)
{
int i;
struct vcpu *vcpu;

14
hypervisor/arch/x86/guest/vcpu.c
View File

@@ -83,7 +83,7 @@ int create_vcpu(uint16_t cpu_id, struct vm *vm, struct vcpu **rtn_vcpu_handle)
if (is_vcpu_bsp(vcpu) && is_vm0(vcpu->vm)) {
/* Set up temporary guest page tables */
vm->arch_vm.guest_init_pml4 = create_guest_initial_paging(vm);
pr_info("VM %d VCPU %d CR3: 0x%016llx ",
pr_info("VM %d VCPU %hu CR3: 0x%016llx ",
vm->attr.id, vcpu->vcpu_id,
vm->arch_vm.guest_init_pml4);
}
@@ -154,7 +154,7 @@ int start_vcpu(struct vcpu *vcpu)
/* If this VCPU is not already launched, launch it */
if (!vcpu->launched) {
pr_info("VM %d Starting VCPU %d",
pr_info("VM %d Starting VCPU %hu",
vcpu->vm->attr.id, vcpu->vcpu_id);
if (vcpu->arch_vcpu.vpid)
@@ -183,7 +183,7 @@ int start_vcpu(struct vcpu *vcpu)
/* See if VM launched successfully */
if (status == 0) {
if (is_vcpu_bsp(vcpu)) {
pr_info("VM %d VCPU %d successfully launched",
pr_info("VM %d VCPU %hu successfully launched",
vcpu->vm->attr.id, vcpu->vcpu_id);
}
}
@@ -263,7 +263,7 @@ void reset_vcpu(struct vcpu *vcpu)
{
struct vlapic *vlapic;
pr_dbg("vcpu%d reset", vcpu->vcpu_id);
pr_dbg("vcpu%hu reset", vcpu->vcpu_id);
ASSERT(vcpu->state != VCPU_RUNNING,
"reset vcpu when it's running");
@@ -293,7 +293,7 @@ void pause_vcpu(struct vcpu *vcpu, enum vcpu_state new_state)
{
uint16_t pcpu_id = get_cpu_id();
pr_dbg("vcpu%d paused, new state: %d",
pr_dbg("vcpu%hu paused, new state: %d",
vcpu->vcpu_id, new_state);
get_schedule_lock(vcpu->pcpu_id);
@@ -317,7 +317,7 @@ void pause_vcpu(struct vcpu *vcpu, enum vcpu_state new_state)
void resume_vcpu(struct vcpu *vcpu)
{
pr_dbg("vcpu%d resumed", vcpu->vcpu_id);
pr_dbg("vcpu%hu resumed", vcpu->vcpu_id);
get_schedule_lock(vcpu->pcpu_id);
vcpu->state = vcpu->prev_state;
@@ -332,7 +332,7 @@ void resume_vcpu(struct vcpu *vcpu)
void schedule_vcpu(struct vcpu *vcpu)
{
vcpu->state = VCPU_RUNNING;
pr_dbg("vcpu%d scheduled", vcpu->vcpu_id);
pr_dbg("vcpu%hu scheduled", vcpu->vcpu_id);
get_schedule_lock(vcpu->pcpu_id);
add_vcpu_to_runqueue(vcpu);

14
hypervisor/arch/x86/guest/vlapic.c
View File

@@ -104,12 +104,12 @@ static void vlapic_set_error(struct vlapic *vlapic, uint32_t mask);
static int vlapic_timer_expired(void *data);
static struct vlapic *
vm_lapic_from_vcpu_id(struct vm *vm, int vcpu_id)
vm_lapic_from_vcpu_id(struct vm *vm, uint16_t vcpu_id)
{
struct vcpu *vcpu;
vcpu = vcpu_from_vid(vm, vcpu_id);
ASSERT(vcpu != NULL, "vm%d, vcpu%d", vm->attr.id, vcpu_id);
ASSERT(vcpu != NULL, "vm%d, vcpu%hu", vm->attr.id, vcpu_id);
return vcpu->arch_vcpu.vlapic;
}
@@ -170,7 +170,7 @@ static inline uint32_t
vlapic_build_id(struct vlapic *vlapic)
{
struct vcpu *vcpu = vlapic->vcpu;
uint32_t id;
uint16_t id;
if (is_vm0(vcpu->vm)) {
/* Get APIC ID sequence format from cpu_storage */
@@ -1528,7 +1528,7 @@ void
vlapic_init(struct vlapic *vlapic)
{
ASSERT(vlapic->vm != NULL, "%s: vm is not initialized", __func__);
ASSERT(vlapic->vcpu->vcpu_id >= 0 &&
ASSERT(vlapic->vcpu->vcpu_id >= 0U &&
vlapic->vcpu->vcpu_id < phys_cpu_num,
"%s: vcpu_id is not initialized", __func__);
ASSERT(vlapic->apic_page != NULL,
@@ -1540,7 +1540,7 @@ vlapic_init(struct vlapic *vlapic)
*/
vlapic->msr_apicbase = DEFAULT_APIC_BASE | APICBASE_ENABLED;
if (vlapic->vcpu->vcpu_id == 0)
if (vlapic->vcpu->vcpu_id == 0U)
vlapic->msr_apicbase |= APICBASE_BSP;
vlapic_create_timer(vlapic);
@@ -1867,7 +1867,7 @@ vlapic_rdmsr(struct vcpu *vcpu, uint32_t msr, uint64_t *rval)
uint32_t offset;
struct vlapic *vlapic;
dev_dbg(ACRN_DBG_LAPIC, "cpu[%d] rdmsr: %x", vcpu->vcpu_id, msr);
dev_dbg(ACRN_DBG_LAPIC, "cpu[%hu] rdmsr: %x", vcpu->vcpu_id, msr);
vlapic = vcpu->arch_vcpu.vlapic;
switch (msr) {
@@ -1912,7 +1912,7 @@ vlapic_wrmsr(struct vcpu *vcpu, uint32_t msr, uint64_t val)
break;
}
dev_dbg(ACRN_DBG_LAPIC, "cpu[%d] wrmsr: %x val=%#x",
dev_dbg(ACRN_DBG_LAPIC, "cpu[%hu] wrmsr: %x val=%#x",
vcpu->vcpu_id, msr, val);
return error;
}