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dm:gvt:reserve gvt bar regions in ACRN-DM

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The current design has the following problem:
gvt uses some pci bar regions,
but ACRN-DM isn't aware of these regions.
So ACRN-DM may allocate these regions for other pci devices,
which will result in other pci devices bar regions
overlap with gvt bar regions.

The new design is the following:
(1) ACRN-DM reads gvt bar regions
which are provided by physical gpu;
(2) ACRN-DM reserves gvt bar regions

v6 -> v7:
	* use array to store reserved bar regions
	* rename some struct and func

v5 -> v6:
	* rename enable_gvt to gvt_enabled
	* add a interface to reserve bar regions
	* reserve gvt bar regions

Tracked-On: projectacrn#4005

Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
This commit is contained in:
Junming Liu
2019-11-12 19:18:50 +00:00
committed by wenlingz
parent 72644ac2b2
commit 1ac0b57c6a
5 changed files with 146 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

60
devicemodel/hw/pci/core.c
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@@ -91,6 +91,8 @@ static uint64_t pci_emul_membase64;
extern bool skip_pci_mem64bar_workaround;
struct mmio_rsvd_rgn reserved_bar_regions[REGION_NUMS];
#define PCI_EMUL_IOBASE 0x2000
#define PCI_EMUL_IOLIMIT 0x10000
@@ -106,6 +108,64 @@ static void pci_cfgrw(struct vmctx *ctx, int vcpu, int in, int bus, int slot,
int func, int coff, int bytes, uint32_t *val);
static void pci_emul_free_msixcap(struct pci_vdev *pdi);
int compare_mmio_rgns(const void *data1, const void *data2)
{
struct mmio_rsvd_rgn *rng1, *rng2;
rng1 = (struct mmio_rsvd_rgn*)data1;
rng2 = (struct mmio_rsvd_rgn*)data2;
if(!rng1->vdev)
return 1;
if(!rng2->vdev)
return -1;
return (rng1->start - rng2->start);
}
/* FIXME: the new registered region may overlap with exist mmio regions
* whatever they are registered by dm or reserved.
* Due to we only has gvt-g to use this feature,
* this case rarely happen.
*/
int create_mmio_rsvd_rgn(uint64_t start,
uint64_t end, int idx, int bar_type, struct pci_vdev *vdev)
{
int i;
if(bar_type == PCIBAR_IO){
perror("fail to create PCIBAR_IO bar_type\n");
return -1;
}
for(i = 0; i < REGION_NUMS; i++){
if(reserved_bar_regions[i].vdev == NULL){
reserved_bar_regions[i].start = start;
reserved_bar_regions[i].end = end;
reserved_bar_regions[i].idx = idx;
reserved_bar_regions[i].bar_type = bar_type;
reserved_bar_regions[i].vdev = vdev;
/* sort reserved_bar_regions array by "start" member,
* if this mmio_rsvd_rgn is not used, put it in the last.
*/
qsort((void*)reserved_bar_regions, REGION_NUMS,
sizeof(reserved_bar_regions[0]), compare_mmio_rgns);
return 0;
}
}
perror("reserved_bar_regions is overflow\n");
return -1;
}
void destory_mmio_rsvd_rgns(struct pci_vdev *vdev){
int i;
for(i = 0; i < REGION_NUMS; i++)
if(reserved_bar_regions[i].vdev == vdev)
reserved_bar_regions[i].vdev = NULL;
}
static inline void
CFGWRITE(struct pci_vdev *dev, int coff, uint32_t val, int bytes)
{