github/acrn-hypervisor
1
0
Fork 0
mirror of https://github.com/projectacrn/acrn-hypervisor.git synced 2025-09-22 17:27:53 +00:00
Code Issues Projects Releases Wiki Activity

dm:gvt:reserve gvt bar regions in ACRN-DM

Browse Source 
The current design has the following problem:
gvt uses some pci bar regions,
but ACRN-DM isn't aware of these regions.
So ACRN-DM may allocate these regions for other pci devices,
which will result in other pci devices bar regions
overlap with gvt bar regions.

The new design is the following:
(1) ACRN-DM reads gvt bar regions
which are provided by physical gpu;
(2) ACRN-DM reserves gvt bar regions

v6 -> v7:
	* use array to store reserved bar regions
	* rename some struct and func

v5 -> v6:
	* rename enable_gvt to gvt_enabled
	* add a interface to reserve bar regions
	* reserve gvt bar regions

Tracked-On: projectacrn#4005

Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
This commit is contained in:
Junming Liu
2019-11-12 19:18:50 +00:00
committed by wenlingz
parent 72644ac2b2
commit 1ac0b57c6a
5 changed files with 146 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

19
devicemodel/include/pci_core.h
View File

@@ -45,6 +45,11 @@
#define PCI_EMUL_MEMBASE64 0x100000000UL /* 4GB */
#define PCI_EMUL_MEMLIMIT64 0x140000000UL /* 5GB */
/* Currently,only gvt need reserved bar regions,
* so just hardcode REGION_NUMS=5 here
*/
#define REGION_NUMS 5
struct vmctx;
struct pci_vdev;
struct memory_region;
@@ -243,6 +248,20 @@ struct pciecap {
} __attribute__((packed));
static_assert(sizeof(struct pciecap) == 60, "compile-time assertion failed");
struct mmio_rsvd_rgn {
uint64_t start;
uint64_t end;
int idx;
int bar_type;
/* if vdev=NULL, it also indicates this mmio_rsvd_rgn is not used */
struct pci_vdev *vdev;
};
extern struct mmio_rsvd_rgn reserved_bar_regions[REGION_NUMS];
int create_mmio_rsvd_rgn(uint64_t start,
uint64_t end, int idx, int bar_type, struct pci_vdev *vdev);
void destory_mmio_rsvd_rgns(struct pci_vdev *vdev);
typedef void (*pci_lintr_cb)(int b, int s, int pin, int pirq_pin,
int ioapic_irq, void *arg);

3
devicemodel/include/vmmapi.h
View File

@@ -67,6 +67,9 @@ struct vmctx {
/* BSP state. guest loader needs to fill it */
struct acrn_set_vcpu_regs bsp_regs;
/* if gvt-g is enabled for current VM */
bool gvt_enabled;
};
#define PROT_RW (PROT_READ | PROT_WRITE)