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HV: refine the ve820 tab for pre-VMs

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This patch moves the ssram area in ve820 tab, and reunites the
hpa1_low_part1/2 areas. The ve820 building code is refined.

before:
|<---low_1M--->|
|<---hpa1_low_part1--->|
|<---SSRAM--->|
|<---hpa1_low_part2--->|
|<---GPU_OpRegion--->|
|<---ACPI DATA--->|
|<---ACPI NVS--->|
---2G---

after:
|<---low_1M--->|
|<---hpa_low--->|
|<---SSRAM--->|
|<---GPU_OpRegion--->|
|<---ACPI DATA--->|
|<---ACPI NVS--->|
---2G---

The SSRAM area's address is described in the ACPI's RTCT/PTCT
table. To simplify the SSRAM implementation, SSRAM area was
identical mapped to GPA, and resulted in the divition of hpa_low.
Then the ve820 building logic became too complicated.

Now we managed to edit the guest's RTCT/PTCT table by offline
tools in the former patch, so we can move the guest's SSRAM
area, and reunite the hpa_low areas again.

After doing this, this patch rewrites the ve820 building code
in a much simpler way.

Tracked-On: #6674

Signed-off-by: Zhou, Wu <wu.zhou@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
This commit is contained in:
Zhou, Wu
2021-09-24 16:03:56 +08:00
committed by wenlingz
parent 48adda150c
commit 1bc25ed198
2 changed files with 27 additions and 49 deletions
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3
hypervisor/include/arch/x86/asm/rtct.h
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@@ -8,6 +8,7 @@
#define RTCT_H
#include <acpi.h>
#include <ptdev.h>
#include "misc_cfg.h"
@@ -41,7 +42,7 @@
* placeholder entry in vE820 table of Prelaunch VM to unify the logic
* to initialize the vE820.
*/
#define PRE_RTVM_SW_SRAM_BASE_GPA 0x40080000U
#define PRE_RTVM_SW_SRAM_BASE_GPA (GPU_OPREGION_GPA - PRE_RTVM_SW_SRAM_MAX_SIZE)
#endif
#define PRE_RTVM_SW_SRAM_MAX_SIZE 0x00800000U