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hv: Add API to set vcpu register

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set_vcpu_regs function is added to set vcpu registers.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
This commit is contained in:
Yin Fengwei 2018-09-29 11:14:57 +08:00 committed by lijinxia
parent 0e0dbbaca3
commit 1c0a3d9a02
3 changed files with 77 additions and 0 deletions
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66
hypervisor/arch/x86/guest/vcpu.c
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@ -163,6 +163,72 @@ struct vcpu *get_ever_run_vcpu(uint16_t pcpu_id)
return per_cpu(ever_run_vcpu, pcpu_id); return per_cpu(ever_run_vcpu, pcpu_id);
} }
void set_vcpu_regs(struct vcpu *vcpu, struct acrn_vcpu_regs *vcpu_regs)
{
struct ext_context *ectx;
struct run_context *ctx;
uint16_t *sel = &(vcpu_regs->cs_sel);
struct segment_sel *seg;
uint32_t limit, attr;
ectx = &(vcpu->arch_vcpu.contexts[vcpu->arch_vcpu.cur_context].ext_ctx);
ctx = &(vcpu->arch_vcpu.contexts[vcpu->arch_vcpu.cur_context].run_ctx);
if (vcpu_regs->cs_ar & (1U << 15U)) {
limit = 0xFFFFFFFFU;
} else {
limit = 0xFFFFU;
}
if (vcpu_regs->cr0 & CR0_PE) {
attr = PROTECTED_MODE_DATA_SEG_AR;
} else {
attr = REAL_MODE_DATA_SEG_AR;
}
for (seg = &(ectx->cs); seg <= &(ectx->gs); seg++) {
seg->base = 0UL;
seg->limit = limit;
seg->attr = attr;
seg->selector = *sel;
sel++;
}
/* override cs attr/base */
ectx->cs.attr = vcpu_regs->cs_ar;
ectx->cs.base = vcpu_regs->cs_base;
ectx->gdtr.base = vcpu_regs->gdt.base;
ectx->gdtr.limit = vcpu_regs->gdt.limit;
ectx->idtr.base = vcpu_regs->idt.base;
ectx->idtr.limit = vcpu_regs->idt.limit;
ectx->ldtr.selector = vcpu_regs->ldt_sel;
ectx->tr.selector = vcpu_regs->tr_sel;
memcpy_s(&(ctx->guest_cpu_regs), sizeof(struct acrn_gp_regs),
&(vcpu_regs->gprs), sizeof(struct acrn_gp_regs));
vcpu_set_rip(vcpu, vcpu_regs->rip);
vcpu_set_efer(vcpu, vcpu_regs->ia32_efer);
vcpu_set_rsp(vcpu, vcpu_regs->gprs.rsp);
if (vcpu_regs->rflags == 0UL) {
vcpu_set_rflags(vcpu, 0x02UL);
} else {
vcpu_set_rflags(vcpu, vcpu_regs->rflags & ~(0x8d5UL));
}
/* cr0, cr3 and cr4 needs be set without using API.
* The real cr0/cr3/cr4 writing will be delayed to
* init_vmcs
*/
ctx->cr0 = vcpu_regs->cr0;
ectx->cr3 = vcpu_regs->cr3;
ctx->cr4 = vcpu_regs->cr4;
}
/*********************************************************************** /***********************************************************************
* vcpu_id/pcpu_id mapping table: * vcpu_id/pcpu_id mapping table:
* *

10
hypervisor/include/arch/x86/guest/guest.h
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@ -62,6 +62,16 @@
exec_vmwrite32(SEG_NAME##_ATTR, (seg).attr); \ exec_vmwrite32(SEG_NAME##_ATTR, (seg).attr); \
} }
/* Define segments constants for guest */
#define REAL_MODE_BSP_INIT_CODE_SEL (0xf000U)
#define REAL_MODE_DATA_SEG_AR (0x0093U)
#define REAL_MODE_CODE_SEG_AR (0x009fU)
#define PROTECTED_MODE_DATA_SEG_AR (0xc093U)
#define PROTECTED_MODE_CODE_SEG_AR (0xc09bU)
#define DR7_INIT_VALUE (0x400UL)
#define LDTR_AR (0x0082U) /* LDT, type must be 2, refer to SDM Vol3 26.3.1.2 */
#define TR_AR (0x008bU) /* TSS (busy), refer to SDM Vol3 26.3.1.2 */
struct e820_mem_params { struct e820_mem_params {
uint64_t mem_bottom; uint64_t mem_bottom;
uint64_t mem_top; uint64_t mem_top;

1
hypervisor/include/arch/x86/guest/vcpu.h
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@ -286,6 +286,7 @@ uint64_t vcpu_get_cr4(struct vcpu *vcpu);
void vcpu_set_cr4(struct vcpu *vcpu, uint64_t val); void vcpu_set_cr4(struct vcpu *vcpu, uint64_t val);
uint64_t vcpu_get_pat_ext(struct vcpu *vcpu); uint64_t vcpu_get_pat_ext(struct vcpu *vcpu);
void vcpu_set_pat_ext(struct vcpu *vcpu, uint64_t val); void vcpu_set_pat_ext(struct vcpu *vcpu, uint64_t val);
void set_vcpu_regs(struct vcpu *vcpu, struct acrn_vcpu_regs *vcpu_regs);
struct vcpu* get_ever_run_vcpu(uint16_t pcpu_id); struct vcpu* get_ever_run_vcpu(uint16_t pcpu_id);
int create_vcpu(uint16_t pcpu_id, struct vm *vm, struct vcpu **rtn_vcpu_handle); int create_vcpu(uint16_t pcpu_id, struct vm *vm, struct vcpu **rtn_vcpu_handle);