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hv: pci: use ECAM to access PCIe Configuration Space

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Use Enhanced Configuration Access Mechanism (MMIO) instead of PCI-compatible
Configuration Mechanism (IO port) to access  PCIe Configuration Space
PCI-compatible Configuration Mechanism (IO port) access is used for UART in
debug version.

Tracked-On: #3475
Signed-off-by: Li Fei1 <fei1.li@intel.com>
This commit is contained in:
Li Fei1
2019-12-05 19:35:23 +08:00
committed by wenlingz
parent 57a362061f
commit 1e50ec8899
6 changed files with 152 additions and 53 deletions
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6
hypervisor/include/hw/pci.h
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@@ -206,6 +206,11 @@ struct pci_pdev {
bool has_af_flr;
};
struct pci_cfg_ops {
uint32_t (*pci_read_cfg)(union pci_bdf bdf, uint32_t offset, uint32_t bytes);
void (*pci_write_cfg)(union pci_bdf bdf, uint32_t offset, uint32_t bytes, uint32_t val);
};
static inline uint32_t pci_bar_offset(uint32_t idx)
{
return PCIR_BARS + (idx << 2U);
@@ -320,4 +325,5 @@ static inline bool is_pci_cfg_bridge(uint8_t header_type)
bool pdev_need_bar_restore(const struct pci_pdev *pdev);
void pdev_restore_bar(const struct pci_pdev *pdev);
void pci_switch_to_mmio_cfg_ops(void);
#endif /* PCI_H_ */