hv: cleanup vmcs.h

-- move 'RFLAGS_AC' to cpu.h
-- move 'VMX_SUPPORT_UNRESTRICTED_GUEST' to msr.h
   and rename it to 'MSR_IA32_MISC_UNRESTRICTED_GUEST'
-- move 'get_vcpu_mode' to vcpu.h
-- remove deadcode 'vmx_eoi_exit()'

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Mingqiang Chi 2019-08-20 09:58:18 +08:00 committed by ACRN System Integration
parent bd09f471a6
commit 2310d99ebf
8 changed files with 15 additions and 23 deletions

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@ -323,8 +323,7 @@ static inline bool is_vmx_disabled(void)
static inline bool pcpu_has_vmx_unrestricted_guest_cap(void) static inline bool pcpu_has_vmx_unrestricted_guest_cap(void)
{ {
return ((msr_read(MSR_IA32_VMX_MISC) & VMX_SUPPORT_UNRESTRICTED_GUEST) return ((msr_read(MSR_IA32_VMX_MISC) & MSR_IA32_MISC_UNRESTRICTED_GUEST) != 0UL);
!= 0UL);
} }
static int32_t check_vmx_mmu_cap(void) static int32_t check_vmx_mmu_cap(void)

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@ -6,6 +6,7 @@
#include <types.h> #include <types.h>
#include <errno.h> #include <errno.h>
#include <vmx.h>
#include <guest_memory.h> #include <guest_memory.h>
#include <vcpu.h> #include <vcpu.h>
#include <vm.h> #include <vm.h>

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@ -11,7 +11,6 @@
#include <cpuid.h> #include <cpuid.h>
#include <vcpu.h> #include <vcpu.h>
#include <vm.h> #include <vm.h>
#include <vmcs.h>
#include <vmx.h> #include <vmx.h>
#include <sgx.h> #include <sgx.h>
#include <guest_pm.h> #include <guest_pm.h>

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@ -5,7 +5,7 @@
*/ */
#include <vm.h> #include <vm.h>
#include <vmcs.h> #include <vmx.h>
#include <schedule.h> #include <schedule.h>
#include <version.h> #include <version.h>
#include <reloc.h> #include <reloc.h>

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@ -127,6 +127,10 @@
/*Bits in EFER special registers */ /*Bits in EFER special registers */
#define EFER_LMA 0x00000400U /* Long mode active (R) */ #define EFER_LMA 0x00000400U /* Long mode active (R) */
#define RFLAGS_C (1U<<0U)
#define RFLAGS_Z (1U<<6U)
#define RFLAGS_AC (1U<<18U)
/* CPU clock frequencies (FSB) */ /* CPU clock frequencies (FSB) */
#define CPU_FSB_83KHZ 83200 #define CPU_FSB_83KHZ 83200
#define CPU_FSB_100KHZ 99840 #define CPU_FSB_100KHZ 99840

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@ -378,6 +378,11 @@ static inline bool is_vcpu_bsp(const struct acrn_vcpu *vcpu)
return (vcpu->vcpu_id == BOOT_CPU_ID); return (vcpu->vcpu_id == BOOT_CPU_ID);
} }
static inline enum vm_cpu_mode get_vcpu_mode(const struct acrn_vcpu *vcpu)
{
return vcpu->arch.cpu_mode;
}
/* do not update Guest RIP for next VM Enter */ /* do not update Guest RIP for next VM Enter */
static inline void vcpu_retain_rip(struct acrn_vcpu *vcpu) static inline void vcpu_retain_rip(struct acrn_vcpu *vcpu)
{ {

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@ -12,7 +12,6 @@
#ifndef ASSEMBLER #ifndef ASSEMBLER
#include <types.h> #include <types.h>
#include <vmx.h>
#include <vcpu.h> #include <vcpu.h>
#define VMX_VMENTRY_FAIL 0x80000000U #define VMX_VMENTRY_FAIL 0x80000000U
@ -22,11 +21,6 @@
#define TYPE_LINEAR_APIC_INST_READ (0UL << 12U) #define TYPE_LINEAR_APIC_INST_READ (0UL << 12U)
#define TYPE_LINEAR_APIC_INST_WRITE (1UL << 12U) #define TYPE_LINEAR_APIC_INST_WRITE (1UL << 12U)
static inline uint32_t vmx_eoi_exit(uint32_t vector)
{
return (VMX_EOI_EXIT0_FULL + ((vector >> 6U) * 2U));
}
/* VM exit qulifications for APIC-access /* VM exit qulifications for APIC-access
* Access type: * Access type:
* 0 = linear access for a data read during instruction execution * 0 = linear access for a data read during instruction execution
@ -46,22 +40,9 @@ static inline uint64_t apic_access_offset(uint64_t qual)
{ {
return (qual & APIC_ACCESS_OFFSET); return (qual & APIC_ACCESS_OFFSET);
} }
#define RFLAGS_C (1U<<0U)
#define RFLAGS_Z (1U<<6U)
#define RFLAGS_AC (1U<<18U)
#define VMX_SUPPORT_UNRESTRICTED_GUEST (1U<<5U)
void init_vmcs(struct acrn_vcpu *vcpu); void init_vmcs(struct acrn_vcpu *vcpu);
void switch_apicv_mode_x2apic(struct acrn_vcpu *vcpu); void switch_apicv_mode_x2apic(struct acrn_vcpu *vcpu);
static inline enum vm_cpu_mode get_vcpu_mode(const struct acrn_vcpu *vcpu)
{
return vcpu->arch.cpu_mode;
}
#endif /* ASSEMBLER */ #endif /* ASSEMBLER */
#endif /* VMCS_H_ */ #endif /* VMCS_H_ */

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@ -563,6 +563,9 @@
#define MSR_IA32_MISC_ENABLE_xTPR (1UL << 23U) #define MSR_IA32_MISC_ENABLE_xTPR (1UL << 23U)
#define MSR_IA32_MISC_ENABLE_XD_DISABLE (1UL << 34U) #define MSR_IA32_MISC_ENABLE_XD_DISABLE (1UL << 34U)
/* Miscellaneous data */
#define MSR_IA32_MISC_UNRESTRICTED_GUEST (1U<<5U)
#ifndef ASSEMBLER #ifndef ASSEMBLER
static inline bool pat_mem_type_invalid(uint64_t x) static inline bool pat_mem_type_invalid(uint64_t x)
{ {