hv: make acrntrace a common feature

Make acrntrace a common feature in both debug and release builds,
instead of debug-only. A new config option ACRNTRACE_ENABLED is added
in scenario to toggle this feature and it is enabled by default.

TRACE_6C is removed due to it violates "C-FN-20: Each function shall
have at most 6 parameters" coding rule and it is never used.

Tracked-On: #8805
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>

hypervisor/Makefile

@@ -198,6 +198,7 @@ COMMON_C_SRCS += dm/vpci/vsriov.c
 COMMON_C_SRCS += dm/vpci/vmcs9900.c
 COMMON_C_SRCS += dm/mmio_dev.c
 COMMON_C_SRCS += dm/vgpio.c
+COMMON_C_SRCS += common/trace.c
 ifeq ($(CONFIG_SCHED_NOOP),y)
 COMMON_C_SRCS += common/sched_noop.c
 endif

hypervisor/common/trace.c

@@ -9,10 +9,7 @@
 #include <ticks.h>
 #include <trace.h>
 
-#define TRACE_CUSTOM			0xFCU
+#ifdef CONFIG_ACRNTRACE_ENABLED
-#define TRACE_FUNC_ENTER		0xFDU
-#define TRACE_FUNC_EXIT			0xFEU
-#define TRACE_STR			0xFFU
 
 /* sizeof(trace_entry) == 4 x 64bit */
 struct trace_entry {
@@ -41,11 +38,7 @@ struct trace_entry {
 
 static inline bool trace_check(uint16_t cpu_id)
 {
-	if (per_cpu(sbuf, cpu_id)[ACRN_TRACE] == NULL) {
+	return (per_cpu(sbuf, cpu_id)[ACRN_TRACE] != NULL);
-		return false;
-	}
-
-	return true;
 }
 
 static inline void trace_put(uint16_t cpu_id, uint32_t evid, uint32_t n_data, struct trace_entry *entry)
@@ -89,28 +82,6 @@ void TRACE_4I(uint32_t evid, uint32_t a, uint32_t b, uint32_t c, uint32_t d)
 	trace_put(cpu_id, evid, 4U, &entry);
 }
 
-void TRACE_6C(uint32_t evid, uint8_t a1, uint8_t a2, uint8_t a3, uint8_t a4, uint8_t b1, uint8_t b2)
-{
-	struct trace_entry entry;
-	uint16_t cpu_id = get_pcpu_id();
-
-	if (!trace_check(cpu_id)) {
-		return;
-	}
-
-	entry.payload.fields_8.a1 = a1;
-	entry.payload.fields_8.a2 = a2;
-	entry.payload.fields_8.a3 = a3;
-	entry.payload.fields_8.a4 = a4;
-	entry.payload.fields_8.b1 = b1;
-	entry.payload.fields_8.b2 = b2;
-	/* payload.fields_8.b3/b4 not used, but is put in trace buf */
-	trace_put(cpu_id, evid, 8U, &entry);
-}
-
-#define TRACE_ENTER TRACE_16STR(TRACE_FUNC_ENTER, __func__)
-#define TRACE_EXIT TRACE_16STR(TRACE_FUNC_EXIT, __func__)
-
 void TRACE_16STR(uint32_t evid, const char name[])
 {
 	struct trace_entry entry;
@@ -133,3 +104,16 @@ void TRACE_16STR(uint32_t evid, const char name[])
 	entry.payload.str[15] = 0;
 	trace_put(cpu_id, evid, 16U, &entry);
 }
+
+#else
+
+void TRACE_2L(__unused uint32_t evid, __unused uint64_t e, __unused uint64_t f) {}
+
+void TRACE_4I(__unused uint32_t evid, __unused uint32_t a, __unused uint32_t b,
+		__unused uint32_t c, __unused uint32_t d)
+{
+}
+
+void TRACE_16STR(__unused uint32_t evid, __unused const char name[]) {}
+
+#endif

hypervisor/include/common/per_cpu.h

@@ -62,8 +62,8 @@ struct per_cpu_region {
 	 * to avoid contention between offline_vcpu and posted interrupt handler
 	 */
 	struct acrn_vcpu *vcpu_array[CONFIG_MAX_VM_NUM] __aligned(8);
-#ifdef HV_DEBUG
 	struct shared_buf *sbuf[ACRN_SBUF_PER_PCPU_ID_MAX];
+#ifdef HV_DEBUG
 	char logbuf[LOG_MESSAGE_MAX_SIZE];
 	uint32_t npk_log_ref;
 #endif

hypervisor/include/common/trace.h

@@ -47,7 +47,6 @@
 
 void TRACE_2L(uint32_t evid, uint64_t e, uint64_t f);
 void TRACE_4I(uint32_t evid, uint32_t a, uint32_t b, uint32_t c, uint32_t d);
-void TRACE_6C(uint32_t evid, uint8_t a1, uint8_t a2, uint8_t a3, uint8_t a4, uint8_t b1, uint8_t b2);
 void TRACE_16STR(uint32_t evid, const char name[]);
 
 #endif /* TRACE_H */

hypervisor/release/trace.c

@@ -1,21 +0,0 @@
-/*
- * Copyright (C) 2018-2022 Intel Corporation.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <types.h>
-
-void TRACE_2L(__unused uint32_t evid, __unused uint64_t e, __unused uint64_t f) {}
-
-void TRACE_4I(__unused uint32_t evid, __unused uint32_t a, __unused uint32_t b,
-		__unused uint32_t c, __unused uint32_t d)
-{
-}
-
-void TRACE_6C(__unused uint32_t evid, __unused uint8_t a1, __unused uint8_t a2,
-		__unused uint8_t a3, __unused uint8_t a4, __unused uint8_t b1, __unused uint8_t b2)
-{
-}
-
-void TRACE_16STR(__unused uint32_t evid, __unused const char name[]) {}

misc/config_tools/schema/config.xsd

@@ -124,6 +124,11 @@ If your VM is not a security VM, leave this option unchecked. </xs:documentation
         <xs:documentation>Enable the software workaround for Machine Check Error on Page Size Change (erratum in some processor families).  For more information about this workaround and affected processors, see this `MCE Avoidance on Page Size Change White Paper &lt;https://www.intel.com/content/www/us/en/developer/articles/troubleshooting/software-security-guidance/technical-documentation/machine-check-error-avoidance-page-size-change.html&gt;`_.</xs:documentation>
       </xs:annotation>
     </xs:element>
+    <xs:element name="ACRNTRACE_ENABLED" type="Boolean" default="y">
+      <xs:annotation acrn:title="Enable acrntrace" acrn:views="advanced">
+        <xs:documentation>acrntrace is a tool running on the Service VM to capture trace data. Enable acrntrace support in hypervisor</xs:documentation>
+      </xs:annotation>
+    </xs:element>
     <xs:element name="VUART_RX_BUF_SIZE" default="256">
       <xs:annotation acrn:title="vuart rx buffer size (bytes)" acrn:views="advanced"
                      acrn:errormsg="'required': 'must config the max rx buffer size of vuart in byte'">

misc/config_tools/xforms/config_common.xsl

@@ -149,6 +149,10 @@
       <xsl:with-param name="value" select="MULTIBOOT2_ENABLED" />
     </xsl:call-template>
 
+    <xsl:call-template name="boolean-by-key">
+      <xsl:with-param name="key" select="'ACRNTRACE_ENABLED'" />
+    </xsl:call-template>
+
     <xsl:call-template name="boolean-by-key-value">
       <xsl:with-param name="key" select="'SSRAM_ENABLED'" />
       <xsl:with-param name="value" select="count(//cache/capability[@id='Software SRAM']) > 0" />