mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-07-04 11:07:51 +00:00
HV: vuart: enable vuart console for VM
In previous code, only for pre-launched VM, hypervisor would create vuart console for each VM. But for post-launched VM, no vuart is created. In this patch, create vuart according to configuration in structure acrn_vm_config. As the new configuration is set for pre-launched VM and post-launched VM, and the vuart initialize process is common for each VM, so, remove CONFIG_PARTITION_MODE from vuart related code. Tracked-On: #2987 Signed-off-by: Conghui Chen <conghui.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
parent
3c92d7bbc7
commit
235d886103
@ -688,8 +688,8 @@ int32_t ptirq_intx_pin_remap(struct acrn_vm *vm, uint32_t virt_pin, uint32_t vpi
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* entry already be held by others, return error.
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*/
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/* no remap for hypervisor owned intx */
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if (is_sos_vm(vm) && hv_used_dbg_intx(virt_sid.intx_id.pin)) {
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/* no remap for vuart intx */
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if (is_vuart_intx(vm, virt_sid.intx_id.pin)) {
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status = -ENODEV;
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}
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@ -398,20 +398,12 @@ int32_t create_vm(uint16_t vm_id, struct acrn_vm_config *vm_config, struct acrn_
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if (vm_load_pm_s_state(vm) == 0) {
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register_pm1ab_handler(vm);
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}
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/* Create virtual uart; just when uart enabled, vuart can work */
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if (is_dbg_uart_enabled()) {
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vuart_init(vm);
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}
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}
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vpic_init(vm);
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#ifdef CONFIG_PARTITION_MODE
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/* Create virtual uart; just when uart enabled, vuart can work */
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if (vm_config->vm_vuart && is_dbg_uart_enabled()) {
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vuart_init(vm);
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}
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#endif
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/* Create virtual uart;*/
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vuart_init(vm, vm_config->vuart);
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vrtc_init(vm);
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vpci_init(vm);
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@ -842,44 +842,32 @@ static int32_t shell_dumpmem(int32_t argc, char **argv)
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return 0;
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}
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static int32_t shell_to_vm_console(__unused int32_t argc, __unused char **argv)
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static int32_t shell_to_vm_console(int32_t argc, char **argv)
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{
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char temp_str[TEMP_STR_SIZE];
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uint16_t vm_id = 0U;
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struct acrn_vm *vm;
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struct acrn_vuart *vu;
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#ifdef CONFIG_PARTITION_MODE
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struct acrn_vm_config *vm_config;
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if (argc == 2U) {
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vm_id = sanitize_vmid(strtol_deci(argv[1]));
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}
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vuart_vmid = vm_id;
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#endif
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/* Get the virtual device node */
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vm = get_vm_from_vmid(vm_id);
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if (!is_valid_vm(vm)) {
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shell_puts("VM is not valid \n");
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return -EINVAL;
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}
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#ifdef CONFIG_PARTITION_MODE
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vm_config = get_vm_config(vm_id);
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if (!vm_config->vm_vuart) {
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snprintf(temp_str, TEMP_STR_SIZE, "No vUART configured for vm%d\n", vm_id);
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shell_puts(temp_str);
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vu = vm_console_vuart(vm);
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if (!vu->active) {
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shell_puts("vuart console is not active \n");
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return 0;
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}
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#endif
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vu = vm_vuart(vm);
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/* UART is now owned by the SOS.
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* Indicate by toggling the flag.
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*/
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vu->active = true;
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console_vmid = vm_id;
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/* Output that switching to SOS shell */
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snprintf(temp_str, TEMP_STR_SIZE, "\r\n----- Entering Guest %d Shell -----\r\n", vm_id);
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snprintf(temp_str, TEMP_STR_SIZE, "\r\n----- Entering VM %d Shell -----\r\n", vm_id);
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shell_puts(temp_str);
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@ -12,6 +12,8 @@
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#define SHELL_CMD_MAX_LEN 100U
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#define SHELL_STRING_MAX_LEN (PAGE_SIZE << 2U)
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extern int16_t console_vmid;
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/* Shell Command Function */
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typedef int32_t (*shell_cmd_fn_t)(int32_t argc, char **argv);
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@ -39,18 +39,11 @@
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static uint32_t vuart_com_irq = CONFIG_COM_IRQ;
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static uint16_t vuart_com_base = CONFIG_COM_BASE;
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#ifndef CONFIG_PARTITION_MODE
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static char vuart_rx_buf[RX_BUF_SIZE];
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static char vuart_tx_buf[TX_BUF_SIZE];
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#endif
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#define vuart_lock_init(vu) spinlock_init(&((vu)->lock))
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#define vuart_lock(vu) spinlock_obtain(&((vu)->lock))
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#define vuart_unlock(vu) spinlock_release(&((vu)->lock))
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#ifdef CONFIG_PARTITION_MODE
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uint16_t vuart_vmid = 0xFFFFU;
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#endif
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uint16_t console_vmid = ACRN_INVALID_VMID;
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static inline void fifo_reset(struct fifo *fifo)
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{
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@ -92,13 +85,8 @@ static inline uint32_t fifo_numchars(const struct fifo *fifo)
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static inline void vuart_fifo_init(struct acrn_vuart *vu)
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{
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#ifdef CONFIG_PARTITION_MODE
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vu->txfifo.buf = vu->vuart_tx_buf;
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vu->rxfifo.buf = vu->vuart_rx_buf;
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#else
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vu->txfifo.buf = vuart_tx_buf;
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vu->rxfifo.buf = vuart_rx_buf;
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#endif
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vu->txfifo.size = TX_BUF_SIZE;
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vu->rxfifo.size = RX_BUF_SIZE;
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fifo_reset(&(vu->txfifo));
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@ -125,9 +113,28 @@ static uint8_t vuart_intr_reason(const struct acrn_vuart *vu)
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}
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}
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struct acrn_vuart *vm_vuart(struct acrn_vm *vm)
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struct acrn_vuart *find_vuart_by_port(struct acrn_vm *vm, uint16_t offset)
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{
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return &(vm->vuart);
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uint8_t i;
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struct acrn_vuart *vu, *ret_vu = NULL;
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/* TODO: support pci vuart find */
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for (i = 0; i < MAX_VUART_NUM_PER_VM; i++) {
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vu = &vm->vuart[i];
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if (vu->active == true && vu->port_base == (offset & ~0x7U)) {
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ret_vu = vu;
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break;
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}
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}
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return ret_vu;
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}
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/*
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* @post return != NULL
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*/
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struct acrn_vuart *vm_console_vuart(struct acrn_vm *vm)
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{
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return &vm->vuart[0];
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}
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/*
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@ -141,7 +148,7 @@ static void vuart_toggle_intr(const struct acrn_vuart *vu)
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uint32_t operation;
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intr_reason = vuart_intr_reason(vu);
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vioapic_get_rte(vu->vm, vuart_com_irq, &rte);
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vioapic_get_rte(vu->vm, vu->irq, &rte);
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/* TODO:
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* Here should assert vuart irq according to CONFIG_COM_IRQ polarity.
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@ -157,18 +164,18 @@ static void vuart_toggle_intr(const struct acrn_vuart *vu)
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operation = (intr_reason != IIR_NOPEND) ? GSI_SET_HIGH : GSI_SET_LOW;
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}
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vpic_set_irqline(vu->vm, vuart_com_irq, operation);
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vioapic_set_irqline_lock(vu->vm, vuart_com_irq, operation);
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vpic_set_irqline(vu->vm, vu->irq, operation);
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vioapic_set_irqline_lock(vu->vm, vu->irq, operation);
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}
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static bool vuart_write(struct acrn_vm *vm, uint16_t offset_arg,
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__unused size_t width, uint32_t value)
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{
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uint16_t offset = offset_arg;
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struct acrn_vuart *vu = vm_vuart(vm);
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struct acrn_vuart *vu = find_vuart_by_port(vm, offset);
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uint8_t value_u8 = (uint8_t)value;
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offset -= vu->base;
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offset -= vu->port_base;
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vuart_lock(vu);
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/*
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* Take care of the special case DLAB accesses first
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@ -253,10 +260,10 @@ static bool vuart_read(struct acrn_vm *vm, struct acrn_vcpu *vcpu, uint16_t offs
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{
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uint16_t offset = offset_arg;
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uint8_t iir, reg, intr_reason;
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struct acrn_vuart *vu = vm_vuart(vm);
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struct acrn_vuart *vu = find_vuart_by_port(vm, offset);
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struct pio_request *pio_req = &vcpu->req.reqs.pio;
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offset -= vu->base;
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offset -= vu->port_base;
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vuart_lock(vu);
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/*
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* Take care of the special case DLAB accesses first
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@ -330,15 +337,33 @@ done:
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return true;
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}
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static void vuart_register_io_handler(struct acrn_vm *vm)
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/*
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* @pre: vuart_idx = 0 or 1
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*/
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static bool vuart_register_io_handler(struct acrn_vm *vm, uint16_t port_base, uint32_t vuart_idx)
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{
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uint32_t pio_idx;
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bool ret = true;
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struct vm_io_range range = {
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.flags = IO_ATTR_RW,
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.base = vuart_com_base,
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.base = port_base,
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.len = 8U
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};
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register_pio_emulation_handler(vm, UART_PIO_IDX, &range, vuart_read, vuart_write);
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switch (vuart_idx) {
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case 0:
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pio_idx = UART_PIO_IDX0;
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break;
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case 1:
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pio_idx = UART_PIO_IDX1;
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break;
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default:
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printf("Not support vuart index %d, will not register \n");
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ret = false;
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}
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if (ret)
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register_pio_emulation_handler(vm, pio_idx, &range, vuart_read, vuart_write);
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return ret;
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}
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/**
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@ -367,7 +392,7 @@ void vuart_console_rx_chars(struct acrn_vuart *vu)
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if (ch == GUEST_CONSOLE_TO_HV_SWITCH_KEY) {
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/* Switch the console */
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vu->active = false;
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console_vmid = ACRN_INVALID_VMID;
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printf("\r\n\r\n ---Entering ACRN SHELL---\r\n");
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}
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if (ch != -1) {
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@ -381,46 +406,79 @@ void vuart_console_rx_chars(struct acrn_vuart *vu)
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struct acrn_vuart *vuart_console_active(void)
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{
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struct acrn_vm *vm = NULL;
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struct acrn_vuart *vu = NULL;
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#ifdef CONFIG_PARTITION_MODE
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if (vuart_vmid < CONFIG_MAX_VM_NUM) {
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vm = get_vm_from_vmid(vuart_vmid);
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if (console_vmid < CONFIG_MAX_VM_NUM) {
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vm = get_vm_from_vmid(console_vmid);
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}
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#else
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vm = get_sos_vm();
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#endif
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if (is_valid_vm(vm)) {
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struct acrn_vuart *vu = vm_vuart(vm);
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if (vu->active) {
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return vu;
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}
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vu = vm_console_vuart(vm);
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}
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return NULL;
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return (vu && vu->active) ? vu : NULL;
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}
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void vuart_init(struct acrn_vm *vm)
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static void vuart_setup(struct acrn_vm *vm,
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struct vuart_config *vu_config, uint16_t vuart_idx)
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{
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uint32_t divisor;
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struct acrn_vuart *vu = vm_vuart(vm);
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struct acrn_vuart *vu = &vm->vuart[vuart_idx];
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/* Set baud rate*/
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divisor = (UART_CLOCK_RATE / BAUD_9600) >> 4U;
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vm->vuart.dll = (uint8_t)divisor;
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vm->vuart.dlh = (uint8_t)(divisor >> 8U);
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vm->vuart.active = false;
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vm->vuart.base = vuart_com_base;
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vm->vuart.vm = vm;
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divisor = (UART_CLOCK_RATE / BAUD_115200) >> 4U;
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vu->dll = (uint8_t)divisor;
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vu->dlh = (uint8_t)(divisor >> 8U);
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vu->vm = vm;
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vuart_fifo_init(vu);
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vuart_lock_init(vu);
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vuart_register_io_handler(vm);
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if (vu_config->type == VUART_LEGACY_PIO) {
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vu->port_base = vu_config->addr.port_base;
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vu->irq = vu_config->irq;
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if (vuart_register_io_handler(vm, vu->port_base, vuart_idx)) {
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vu->active = true;
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}
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} else {
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/*TODO: add pci vuart support here*/
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printf("PCI vuart is not support\n");
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}
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}
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bool hv_used_dbg_intx(uint32_t intx_pin)
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bool is_vuart_intx(struct acrn_vm *vm, uint32_t intx_pin)
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{
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return is_dbg_uart_enabled() && (intx_pin == vuart_com_irq);
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uint8_t i;
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bool ret = false;
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for (i = 0; i < MAX_VUART_NUM_PER_VM; i++)
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if (vm->vuart[i].active && vm->vuart[i].irq == intx_pin)
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ret = true;
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return ret;
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}
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void vuart_init(struct acrn_vm *vm, struct vuart_config *vu_config)
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{
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uint8_t i;
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for (i = 0; i < MAX_VUART_NUM_PER_VM; i++) {
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vm->vuart[i].active = false;
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/* This vuart is not exist */
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if (vu_config[i].type == VUART_LEGACY_PIO &&
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vu_config[i].addr.port_base == INVALID_COM_BASE)
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continue;
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vuart_setup(vm, &vu_config[i], i);
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}
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}
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void vuart_deinit(struct acrn_vm *vm)
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{
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uint8_t i;
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/* reset console_vmid to switch back to hypervisor console */
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if (console_vmid == vm->vm_id)
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console_vmid = ACRN_INVALID_VMID;
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for (i = 0; i < MAX_VUART_NUM_PER_VM; i++) {
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vm->vuart[i].active = false;
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}
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}
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/* vuart=ttySx@irqN, like vuart=ttyS1@irq6 head "vuart=ttyS" is parsed */
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@ -120,7 +120,7 @@ struct acrn_vm {
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struct e820_entry *e820_entries;
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uint16_t vm_id; /* Virtual machine identifier */
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enum vm_state state; /* VM state */
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struct acrn_vuart vuart; /* Virtual UART */
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struct acrn_vuart vuart[MAX_VUART_NUM_PER_VM]; /* Virtual UART */
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enum vpic_wire_mode wire_mode;
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struct iommu_domain *iommu; /* iommu domain of this VM */
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spinlock_t spinlock; /* Spin-lock used to protect VM modifications */
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@ -15,8 +15,10 @@
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#define PIC_ELC_PIO_IDX (PIC_SLAVE_PIO_IDX + 1U)
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#define PCI_CFGADDR_PIO_IDX (PIC_ELC_PIO_IDX + 1U)
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#define PCI_CFGDATA_PIO_IDX (PCI_CFGADDR_PIO_IDX + 1U)
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#define UART_PIO_IDX (PCI_CFGDATA_PIO_IDX + 1U)
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#define PM1A_EVT_PIO_IDX (UART_PIO_IDX + 1U)
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/* When MAX_VUART_NUM_PER_VM is larger than 2, UART_PIO_IDXn should also be added here */
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#define UART_PIO_IDX0 (PCI_CFGDATA_PIO_IDX + 1U)
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#define UART_PIO_IDX1 (UART_PIO_IDX0 + 1U)
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#define PM1A_EVT_PIO_IDX (UART_PIO_IDX1 + 1U)
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#define PM1A_CNT_PIO_IDX (PM1A_EVT_PIO_IDX + 1U)
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#define PM1B_EVT_PIO_IDX (PM1A_CNT_PIO_IDX + 1U)
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#define PM1B_CNT_PIO_IDX (PM1B_EVT_PIO_IDX + 1U)
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@ -88,7 +88,6 @@ struct acrn_vm_config {
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struct acrn_vm_os_config os_config; /* OS information the VM */
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uint16_t clos; /* if guest_flags has GUEST_FLAG_CLOS_REQUIRED, then VM use this CLOS */
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bool vm_vuart;
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struct vuart_config vuart[MAX_VUART_NUM_PER_VM];/* vuart configuration for VM */
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struct mptable_info *mptable; /* Pointer to mptable struct if VM type is pre-launched */
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} __aligned(8);
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@ -31,9 +31,11 @@
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#define VUART_H
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#include <types.h>
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#include <spinlock.h>
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#include <vm_config.h>
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#define RX_BUF_SIZE 256U
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#define TX_BUF_SIZE 8192U
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#define INVAILD_VUART_IDX 0xFFU
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#define COM1_BASE 0x3F8U
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#define COM2_BASE 0x2F8U
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@ -68,27 +70,23 @@ struct acrn_vuart {
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struct fifo rxfifo;
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struct fifo txfifo;
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uint16_t base;
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#ifdef CONFIG_PARTITION_MODE
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uint16_t port_base;
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uint32_t irq;
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char vuart_rx_buf[RX_BUF_SIZE];
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char vuart_tx_buf[TX_BUF_SIZE];
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#endif
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bool thre_int_pending; /* THRE interrupt pending */
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bool active;
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struct acrn_vm *vm;
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spinlock_t lock; /* protects all softc elements */
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||||
};
|
||||
|
||||
#ifdef CONFIG_PARTITION_MODE
|
||||
extern uint16_t vuart_vmid;
|
||||
#endif /* CONFIG_PARTITION_MODE */
|
||||
|
||||
struct acrn_vuart *vm_vuart(struct acrn_vm *vm);
|
||||
void vuart_init(struct acrn_vm *vm);
|
||||
struct acrn_vuart *vm_console_vuart(struct acrn_vm *vm);
|
||||
void vuart_init(struct acrn_vm *vm, struct vuart_config *vu_config);
|
||||
void vuart_deinit(struct acrn_vm *vm);
|
||||
struct acrn_vuart *vuart_console_active(void);
|
||||
void vuart_console_tx_chars(struct acrn_vuart *vu);
|
||||
void vuart_console_rx_chars(struct acrn_vuart *vu);
|
||||
|
||||
bool hv_used_dbg_intx(uint32_t intx_pin);
|
||||
bool is_vuart_intx(struct acrn_vm *vm, uint32_t intx_pin);
|
||||
void vuart_set_property(const char *vuart_info);
|
||||
#endif /* VUART_H */
|
||||
|
@ -7,8 +7,8 @@
|
||||
#include <types.h>
|
||||
#include <vm.h>
|
||||
|
||||
void vuart_init(__unused struct acrn_vm *vm) {}
|
||||
|
||||
void vuart_init(__unused struct acrn_vm *vm, __unused struct vuart_config *vu_config) {}
|
||||
void vuart_deinit(__unused struct acrn_vm *vm) {}
|
||||
struct acrn_vuart *vuart_console_active(void)
|
||||
{
|
||||
return NULL;
|
||||
@ -17,7 +17,7 @@ struct acrn_vuart *vuart_console_active(void)
|
||||
void vuart_console_tx_chars(__unused struct acrn_vuart *vu) {}
|
||||
void vuart_console_rx_chars(__unused struct acrn_vuart *vu) {}
|
||||
|
||||
bool hv_used_dbg_intx(__unused uint32_t intx_pin)
|
||||
bool is_vuart_intx(__unused struct acrn_vm *vm, __unused uint32_t intx_pin)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
@ -37,7 +37,6 @@ struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = {
|
||||
no_timer_check ignore_loglevel log_buf_len=16M \
|
||||
consoleblank=0 tsc=reliable xapic_phys"
|
||||
},
|
||||
.vm_vuart = true,
|
||||
.vuart[0] = {
|
||||
.type = VUART_LEGACY_PIO,
|
||||
.addr.port_base = COM1_BASE,
|
||||
@ -77,7 +76,6 @@ struct acrn_vm_config vm_configs[CONFIG_MAX_VM_NUM] = {
|
||||
no_timer_check ignore_loglevel log_buf_len=16M \
|
||||
consoleblank=0 tsc=reliable xapic_phys"
|
||||
},
|
||||
.vm_vuart = true,
|
||||
.vuart[0] = {
|
||||
.type = VUART_LEGACY_PIO,
|
||||
.addr.port_base = COM1_BASE,
|
||||
|
@ -28,7 +28,7 @@
|
||||
#define VM0_CONFIG_MEM_SIZE 0x20000000UL
|
||||
#define VM0_CONFIG_OS_BOOTARG_ROOT "root=/dev/sda3 "
|
||||
#define VM0_CONFIG_OS_BOOTARG_MAXCPUS "maxcpus=2 "
|
||||
#define VM0_CONFIG_OS_BOOTARG_CONSOLE "console=ttyS2 "
|
||||
#define VM0_CONFIG_OS_BOOTARG_CONSOLE "console=ttyS0 "
|
||||
#define VM0_CONFIG_PCI_PTDEV_NUM 3U
|
||||
|
||||
#define VM1_CONFIG_PCPU_BITMAP (PLUG_CPU(1) | PLUG_CPU(3))
|
||||
@ -37,7 +37,7 @@
|
||||
#define VM1_CONFIG_MEM_SIZE 0x20000000UL
|
||||
#define VM1_CONFIG_OS_BOOTARG_ROOT "root=/dev/sda3 "
|
||||
#define VM1_CONFIG_OS_BOOTARG_MAXCPUS "maxcpus=2 "
|
||||
#define VM1_CONFIG_OS_BOOTARG_CONSOLE "console=ttyS2 "
|
||||
#define VM1_CONFIG_OS_BOOTARG_CONSOLE "console=ttyS0 "
|
||||
#define VM1_CONFIG_PCI_PTDEV_NUM 3U
|
||||
|
||||
#endif /* VM_CONFIGURATIONS_H */
|
||||
|
Loading…
Reference in New Issue
Block a user