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hv: vpci: revert do FLR and BAR restore
Since we restore BAR values when writing Command Register if necessary. We don't need to trap FLR and do the BAR restore then. Tracked-On: #3475 Signed-off-by: Li Fei1 <fei1.li@intel.com>
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@@ -233,11 +233,6 @@ void init_vdev_pt(struct pci_vdev *vdev)
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vdev->nr_bars = vdev->pdev->nr_bars;
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pbdf.value = vdev->pdev->bdf.value;
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vdev->has_flr = vdev->pdev->has_flr;
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vdev->pcie_capoff = vdev->pdev->pcie_capoff;
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vdev->has_af_flr = vdev->pdev->has_af_flr;
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vdev->af_capoff = vdev->pdev->af_capoff;
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for (idx = 0U; idx < vdev->nr_bars; idx++) {
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vbar = &vdev->vbars[idx];
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offset = pci_bar_offset(idx);
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@@ -337,11 +337,6 @@ static int32_t vpci_write_pt_dev_cfg(struct pci_vdev *vdev, uint32_t offset,
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vmsi_write_cfg(vdev, offset, bytes, val);
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} else if (msixcap_access(vdev, offset)) {
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vmsix_write_cfg(vdev, offset, bytes, val);
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} else if ((vdev->has_flr && ((vdev->pcie_capoff + PCIR_PCIE_DEVCTRL) == offset) &&
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((val & PCIM_PCIE_FLR) != 0U)) || (vdev->has_af_flr &&
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((vdev->af_capoff + PCIR_AF_CTRL) == offset) && ((val & PCIM_AF_FLR) != 0U))) {
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/* Assume that guest write FLR must be 4 bytes aligned */
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pdev_do_flr(vdev->pdev->bdf, offset, bytes, val);
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} else if (offset == PCIR_COMMAND) {
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vdev_pt_write_command(vdev, (bytes > 2U) ? 2U : bytes, (uint16_t)val);
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} else {
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