hv: vpci: revert do FLR and BAR restore

Since we restore BAR values when writing Command Register if necessary. We don't
need to trap FLR and do the BAR restore then.

Tracked-On: #3475
Signed-off-by: Li Fei1 <fei1.li@intel.com>

hypervisor/arch/x86/timer.c

@@ -338,22 +338,3 @@ void udelay(uint32_t us)
 	while (rdtsc() < dest_tsc) {
 	}
 }
-
-/*
- * @pre ms <= MAX_UINT32 / 1000U
- */
-void msleep(uint32_t ms)
-{
-	uint64_t dest_tsc, delta_tsc;
-
-	/* Calculate number of ticks to wait */
-	delta_tsc = us_to_ticks(ms * 1000U);
-	dest_tsc = rdtsc() + delta_tsc;
-
-	/* Loop until time expired */
-	while (rdtsc() < dest_tsc) {
-		if (need_reschedule(get_pcpu_id())) {
-			schedule();
-		}
-	}
-}

hypervisor/dm/vpci/pci_pt.c

@@ -233,11 +233,6 @@ void init_vdev_pt(struct pci_vdev *vdev)
 	vdev->nr_bars = vdev->pdev->nr_bars;
 	pbdf.value = vdev->pdev->bdf.value;
 
-	vdev->has_flr = vdev->pdev->has_flr;
-	vdev->pcie_capoff = vdev->pdev->pcie_capoff;
-	vdev->has_af_flr = vdev->pdev->has_af_flr;
-	vdev->af_capoff = vdev->pdev->af_capoff;
-
 	for (idx = 0U; idx < vdev->nr_bars; idx++) {
 		vbar = &vdev->vbars[idx];
 		offset = pci_bar_offset(idx);

hypervisor/dm/vpci/vpci.c

@@ -337,11 +337,6 @@ static int32_t vpci_write_pt_dev_cfg(struct pci_vdev *vdev, uint32_t offset,
 		vmsi_write_cfg(vdev, offset, bytes, val);
 	} else if (msixcap_access(vdev, offset)) {
 		vmsix_write_cfg(vdev, offset, bytes, val);
-	} else if ((vdev->has_flr && ((vdev->pcie_capoff + PCIR_PCIE_DEVCTRL) == offset) &&
-				((val & PCIM_PCIE_FLR) != 0U)) || (vdev->has_af_flr &&
-				((vdev->af_capoff + PCIR_AF_CTRL) == offset) && ((val & PCIM_AF_FLR) != 0U))) {
-			/* Assume that guest write FLR must be 4 bytes aligned */
-			pdev_do_flr(vdev->pdev->bdf, offset, bytes, val);
 	} else if (offset == PCIR_COMMAND) {
 		vdev_pt_write_command(vdev, (bytes > 2U) ? 2U : bytes, (uint16_t)val);
 	} else {

hypervisor/hw/pci.c

@@ -42,7 +42,6 @@
 #include <bits.h>
 #include <board.h>
 #include <platform_acpi_info.h>
-#include <timer.h>
 
 static spinlock_t pci_device_lock;
 static uint32_t num_pci_pdev;
@@ -483,13 +482,11 @@ static void pci_read_cap(struct pci_pdev *pdev)
 				pdev->msix.cap[idx] = (uint8_t)pci_pdev_read_cfg(pdev->bdf, (uint32_t)pos + idx, 1U);
 			}
 		} else if (cap == PCIY_PCIE) {
-			pdev->pcie_capoff = pos;
 			pcie_devcap = pci_pdev_read_cfg(pdev->bdf, pos + PCIR_PCIE_DEVCAP, 4U);
-			pdev->has_flr = ((pcie_devcap & PCIM_PCIE_FLRCAP) != 0U) ? true : false;
+			pdev->has_flr = ((pcie_devcap & PCIM_PCIE_FLRCAP) != 0U);
 		} else if (cap == PCIY_AF) {
-			pdev->af_capoff = pos;
 			val = pci_pdev_read_cfg(pdev->bdf, pos, 4U);
-			pdev->has_af_flr = ((val & PCIM_AF_FLR_CAP) != 0U) ? true : false;
+			pdev->has_af_flr = ((val & PCIM_AF_FLR_CAP) != 0U);
 		} else {
 			/* Ignore all other Capability IDs for now */
 		}
@@ -535,27 +532,3 @@ static void init_pdev(uint16_t pbdf, uint32_t drhd_index)
 		pr_err("%s, failed to alloc pci_pdev!\n", __func__);
 	}
 }
-
-void pdev_do_flr(union pci_bdf bdf, uint32_t offset, uint32_t bytes, uint32_t val)
-{
-	uint32_t idx;
-	uint32_t bars[PCI_STD_NUM_BARS];
-
-	for (idx = 0U; idx < PCI_STD_NUM_BARS; idx++) {
-		bars[idx] = pci_pdev_read_cfg(bdf, pci_bar_offset(idx), 4U);
-	}
-
-	/* do the real reset */
-	pci_pdev_write_cfg(bdf, offset, bytes, val);
-
-	/*
-	 * After an FLR has been initiated by writing a 1b to
-	 * the Initiate Function Level Reset bit,
-	 * the Function must complete the FLR within 100 ms
-	 */
-	msleep(100U);
-
-	for (idx = 0U; idx < PCI_STD_NUM_BARS; idx++) {
-		pci_pdev_write_cfg(bdf, pci_bar_offset(idx), 4U, bars[idx]);
-	}
-}

hypervisor/include/arch/x86/timer.h

@@ -50,7 +50,6 @@ struct hv_timer {
 #define CYCLES_PER_MS	us_to_ticks(1000U)
 
 void udelay(uint32_t us);
-void msleep(uint32_t ms);
 
 /**
  * @brief convert us to ticks.

hypervisor/include/dm/vpci.h

@@ -99,12 +99,6 @@ struct pci_vdev {
 	struct pci_msi msi;
 	struct pci_msix msix;
 
-	bool has_flr;
-	uint32_t pcie_capoff;
-
-	bool has_af_flr;
-	uint32_t af_capoff;
-
 	/* Pointer to corresponding PCI device's vm_config */
 	struct acrn_vm_pci_dev_config *pci_dev_config;
 

hypervisor/include/hw/pci.h

@@ -195,13 +195,8 @@ struct pci_pdev {
 
 	struct pci_msix_cap msix;
 
-	/* Function Level Reset Capability */
 	bool has_flr;
-	uint32_t pcie_capoff;
-
-	/* Conventional PCI Advanced Features FLR Capability */
 	bool has_af_flr;
-	uint32_t af_capoff;
 };
 
 static inline uint32_t pci_bar_offset(uint32_t idx)
@@ -316,7 +311,6 @@ static inline bool is_pci_cfg_bridge(uint8_t header_type)
 	return ((header_type & PCIM_HDRTYPE) == PCIM_HDRTYPE_BRIDGE);
 }
 
-void pdev_do_flr(union pci_bdf bdf, uint32_t offset, uint32_t bytes, uint32_t val);
 bool pdev_need_bar_restore(const struct pci_pdev *pdev);
 void pdev_restore_bar(const struct pci_pdev *pdev);