ACRN:DM:PCI: Add the support of allocating resource for PCI ROM bar

Now the device model only supports the 0..5 PCI bar for PCI/PCIE devices.
This tries to allocate the PCI_MEM32 resource for PCI ROM bar.

V1->V2: Use the PCI_ROMBAR as bar index and PCIBAR_ROM bar type when calling
the pci_emul_alloc_bar to allocate the guest physical addr for PCI ROM bar.
And it will allocate the resource from PCIBAR_MEM32 region.

V2->V3: Add more comments that describes the parameter of pci_emul_alloc_bar.

Tracked-On: #8175
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Wang Yu <yu1.wang@intel.com>
This commit is contained in:
Zhao Yakui
2022-09-21 13:13:08 +08:00
committed by acrnsi-robot
parent 50cdcb3660
commit 270aaf82d8
2 changed files with 52 additions and 8 deletions

View File

@@ -784,6 +784,23 @@ pci_emul_alloc_pbar(struct pci_vdev *pdi, int idx, uint64_t hostbase,
size = 16;
}
if (idx > PCI_ROMBAR) {
pr_err("%s: invalid bar number %d for PCI bar type\n", __func__, idx);
return -1;
}
if (idx == PCI_ROMBAR) {
/*
* It needs to pass the PCIBAR_ROM for PCI_ROMBAR idx. But as it
* is allocated from PCI_EMUL_MEM32 type, the internal type is
* changed to PCIBAR_MEM32
*/
if (type != PCIBAR_ROM) {
pr_err("%s: invalid bar type %d for PCI ROM\n",
__func__, type);
return -1;
}
type = PCIBAR_MEM32;
}
switch (type) {
case PCIBAR_NONE:
baseptr = NULL;
@@ -853,13 +870,20 @@ pci_emul_alloc_pbar(struct pci_vdev *pdi, int idx, uint64_t hostbase,
pdi->bar[idx].addr = addr;
pdi->bar[idx].size = size;
/* Initialize the BAR register in config space */
bar = (addr & mask) | lobits;
pci_set_cfgdata32(pdi, PCIR_BAR(idx), bar);
if (idx == PCI_ROMBAR) {
mask = PCIM_BIOS_ADDR_MASK;
bar = addr & mask;
/* enable flag will be configured later */
pci_set_cfgdata32(pdi, PCIR_BIOS, bar);
} else {
/* Initialize the BAR register in config space */
bar = (addr & mask) | lobits;
pci_set_cfgdata32(pdi, PCIR_BAR(idx), bar);
if (type == PCIBAR_MEM64) {
pdi->bar[idx + 1].type = PCIBAR_MEMHI64;
pci_set_cfgdata32(pdi, PCIR_BAR(idx + 1), bar >> 32);
if (type == PCIBAR_MEM64) {
pdi->bar[idx + 1].type = PCIBAR_MEMHI64;
pci_set_cfgdata32(pdi, PCIR_BAR(idx + 1), bar >> 32);
}
}
error = register_bar(pdi, idx);