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ACRN:DM:PCI: Add the support of allocating resource for PCI ROM bar
Now the device model only supports the 0..5 PCI bar for PCI/PCIE devices. This tries to allocate the PCI_MEM32 resource for PCI ROM bar. V1->V2: Use the PCI_ROMBAR as bar index and PCIBAR_ROM bar type when calling the pci_emul_alloc_bar to allocate the guest physical addr for PCI ROM bar. And it will allocate the resource from PCIBAR_MEM32 region. V2->V3: Add more comments that describes the parameter of pci_emul_alloc_bar. Tracked-On: #8175 Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Acked-by: Wang Yu <yu1.wang@intel.com>
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@@ -784,6 +784,23 @@ pci_emul_alloc_pbar(struct pci_vdev *pdi, int idx, uint64_t hostbase,
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size = 16;
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}
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if (idx > PCI_ROMBAR) {
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pr_err("%s: invalid bar number %d for PCI bar type\n", __func__, idx);
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return -1;
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}
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if (idx == PCI_ROMBAR) {
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/*
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* It needs to pass the PCIBAR_ROM for PCI_ROMBAR idx. But as it
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* is allocated from PCI_EMUL_MEM32 type, the internal type is
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* changed to PCIBAR_MEM32
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*/
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if (type != PCIBAR_ROM) {
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pr_err("%s: invalid bar type %d for PCI ROM\n",
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__func__, type);
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return -1;
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}
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type = PCIBAR_MEM32;
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}
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switch (type) {
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case PCIBAR_NONE:
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baseptr = NULL;
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@@ -853,13 +870,20 @@ pci_emul_alloc_pbar(struct pci_vdev *pdi, int idx, uint64_t hostbase,
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pdi->bar[idx].addr = addr;
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pdi->bar[idx].size = size;
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/* Initialize the BAR register in config space */
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bar = (addr & mask) | lobits;
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pci_set_cfgdata32(pdi, PCIR_BAR(idx), bar);
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if (idx == PCI_ROMBAR) {
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mask = PCIM_BIOS_ADDR_MASK;
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bar = addr & mask;
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/* enable flag will be configured later */
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pci_set_cfgdata32(pdi, PCIR_BIOS, bar);
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} else {
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/* Initialize the BAR register in config space */
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bar = (addr & mask) | lobits;
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pci_set_cfgdata32(pdi, PCIR_BAR(idx), bar);
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if (type == PCIBAR_MEM64) {
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pdi->bar[idx + 1].type = PCIBAR_MEMHI64;
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pci_set_cfgdata32(pdi, PCIR_BAR(idx + 1), bar >> 32);
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if (type == PCIBAR_MEM64) {
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pdi->bar[idx + 1].type = PCIBAR_MEMHI64;
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pci_set_cfgdata32(pdi, PCIR_BAR(idx + 1), bar >> 32);
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}
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}
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error = register_bar(pdi, idx);
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