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@ -16,8 +16,8 @@ High Level ACRN SGX Virtualization Design
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ACRN SGX virtualization support can be divided into three parts:
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* SGX capability exposed to Guest EPC (Enclave Page Cache) management Enclave
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* System function handing
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* SGX capability exposed to Guest
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* EPC (Enclave Page Cache) management
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* Enclave System function handling
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The image below shows the high-level design of SGX virtualization in ACRN.
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@ -95,19 +95,25 @@ enable SGX support in the BIOS and in ACRN:
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.. code-block:: bash
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$ cd <projectacrn base folder>
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$ curl https://github.com/binbinwu1/acrn-hypervisor/commit/
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0153b2b9b9920b61780163f19c6f5318562215ef.patch | git apply
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$ curl https://github.com/binbinwu1/acrn-hypervisor/commit \
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/0153b2b9b9920b61780163f19c6f5318562215ef.patch | git apply
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#. Enable SGX in Guest:
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Follow the relevant guide to build and install the SGX driver and the SGX SDK and PSW packages.
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* Refer to https://github.com/intel/linux-sgx on how to enable SGX in Linux
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Guest.
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* Refer to https://software.intel.com/en-us/articles/
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getting-started-with-sgx-sdk-for-windows on how to enable SGX in Windows
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Guest.
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* **For a Linux Guest**, follow the instructions at
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https://github.com/intel/linux-sgx to build and installthe SGX driver and
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the SGX SDK and PSW packages.
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* **For a Windows Guest**, follow the guide at
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https://software.intel.com/en-us/articles/getting-started-with-sgx
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-sdk-for-windows for enabling applications with Intel SGX using
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Microsoft* Visual Studio* 2015 on a 64-bit Microsoft Windows* OS.
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SGX Capability Exposure
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***********************
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ACRN exposes SGX capability and EPC resource to a guest VM via CPUIDs and
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Processor Model-Specific Registers (MSRs), as explained in the following
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sections.
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CPUID Virtualization
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====================
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@ -239,6 +245,8 @@ PAUSE exiting
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Future Development
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******************
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Following are some currently unplanned areas of interest for future
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ACRN development around SGX virtualization.
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Launch Configuration support
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============================
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