From 2a4c59db7401d1a17cc6492917e1262c92ecc053 Mon Sep 17 00:00:00 2001 From: Conghui Chen Date: Wed, 17 Jun 2020 19:06:49 +0000 Subject: [PATCH] hv: add check for BASIC VMX INFORMATION MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Check bit 48 in IA32_VMX_BASIC MSR, if it is 1, return error, as we only support Intel 64 architecture. SDM: Appendix A.1 BASIC VMX INFORMATION Bit 48 indicates the width of the physical addresses that may be used for the VMXON region, each VMCS, anddata structures referenced by pointers in a VMCS (I/O bitmaps, virtual-APIC page, MSR areas for VMX transitions). If the bit is 0, these addresses are limited to the processor’s physical-address width.2 If the bit is 1, these addresses are limited to 32 bits. This bit is always 0 for processors that support Intel 64 architecture. Tracked-On: #4956 Signed-off-by: Conghui Chen --- hypervisor/arch/x86/cpu_caps.c | 8 ++++++++ hypervisor/include/arch/x86/msr.h | 3 +++ 2 files changed, 11 insertions(+) diff --git a/hypervisor/arch/x86/cpu_caps.c b/hypervisor/arch/x86/cpu_caps.c index bc5eadfec..10bacec1f 100644 --- a/hypervisor/arch/x86/cpu_caps.c +++ b/hypervisor/arch/x86/cpu_caps.c @@ -206,6 +206,11 @@ static void detect_vmx_mmu_cap(void) cpu_caps.vmx_vpid = (uint32_t) (val >> 32U); } +static bool pcpu_vmx_set_32bit_addr_width(void) +{ + return ((msr_read(MSR_IA32_VMX_BASIC) & MSR_IA32_VMX_BASIC_ADDR_WIDTH) != 0UL); +} + static void detect_xsave_cap(void) { uint32_t unused; @@ -464,6 +469,9 @@ int32_t detect_hardware_support(void) } else if (is_vmx_disabled()) { printf("%s, VMX can not be enabled\n", __func__); ret = -ENODEV; + } else if (pcpu_vmx_set_32bit_addr_width()) { + printf("%s, Only support Intel 64 architecture.\n", __func__); + ret = -ENODEV; } else if (!pcpu_has_cap(X86_FEATURE_X2APIC)) { printf("%s, x2APIC not supported\n", __func__); ret = -ENODEV; diff --git a/hypervisor/include/arch/x86/msr.h b/hypervisor/include/arch/x86/msr.h index d311f8dbe..afa57268d 100644 --- a/hypervisor/include/arch/x86/msr.h +++ b/hypervisor/include/arch/x86/msr.h @@ -571,6 +571,9 @@ /* Miscellaneous data */ #define MSR_IA32_MISC_UNRESTRICTED_GUEST (1U<<5U) +/* Width of physical address used by VMX related region */ +#define MSR_IA32_VMX_BASIC_ADDR_WIDTH (1UL << 48U) + /* 5 high-order bits in every field are reserved */ #define PAT_FIELD_RSV_BITS (0xF8UL)