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https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-06-21 13:08:42 +00:00
dm/VBS-U: implement generic PCI barread/barwrite
This patch implements the generic PCI barread/barwrite callbacks. Specific barread/barwrite interfaces are called based on the baridx. Virtio legacy devices, transitional devices and modern devices can be handled in an unified way. Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com> Reviewed-by: Hao Li <hao.l.li@intel.com> Reviewed-by: Yin Fengwei <fengwei.yin@intel.com> Reviewed-by: Zhao Yakui <yakui.zhao@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Jian Jun Chen
Jack Ren
parent
5670f33278
commit
2adac78d4f
@ -541,9 +541,9 @@ virtio_find_cr(int offset) {
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* If it's part of the virtio standard stuff, do that.
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* Otherwise dispatch to the actual driver.
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*/
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uint64_t
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virtio_pci_read(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int baridx, uint64_t offset, int size)
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static uint64_t
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virtio_pci_legacy_read(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int baridx, uint64_t offset, int size)
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{
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struct virtio_base *base = dev->arg;
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struct virtio_ops *vops;
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@ -554,13 +554,6 @@ virtio_pci_read(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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uint32_t value;
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int error;
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if (base->flags & VIRTIO_USE_MSIX) {
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if (baridx == pci_msix_table_bar(dev) ||
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baridx == pci_msix_pba_bar(dev)) {
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return pci_emul_msix_tread(dev, offset, size);
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}
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}
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/* XXX probably should do something better than just assert() */
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assert(baridx == base->legacy_pio_bar_idx);
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@ -662,9 +655,9 @@ done:
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* If it's part of the virtio standard stuff, do that.
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* Otherwise dispatch to the actual driver.
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*/
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void
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virtio_pci_write(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int baridx, uint64_t offset, int size, uint64_t value)
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static void
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virtio_pci_legacy_write(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int baridx, uint64_t offset, int size, uint64_t value)
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{
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struct virtio_base *base = dev->arg;
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struct virtio_vq_info *vq;
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@ -675,14 +668,6 @@ virtio_pci_write(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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uint32_t newoff;
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int error;
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if (base->flags & VIRTIO_USE_MSIX) {
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if (baridx == pci_msix_table_bar(dev) ||
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baridx == pci_msix_pba_bar(dev)) {
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pci_emul_msix_twrite(dev, offset, size, value);
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return;
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}
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}
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/* XXX probably should do something better than just assert() */
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assert(baridx == base->legacy_pio_bar_idx);
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@ -930,3 +915,318 @@ virtio_set_modern_bar(struct virtio_base *base, bool use_notify_pio)
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return rc;
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}
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static struct cap_region {
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uint64_t cap_offset; /* offset of capability region */
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int cap_size; /* size of capability region */
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int cap_id; /* capability id */
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} cap_regions[] = {
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{VIRTIO_CAP_COMMON_OFFSET, VIRTIO_CAP_COMMON_SIZE,
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VIRTIO_PCI_CAP_COMMON_CFG},
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{VIRTIO_CAP_ISR_OFFSET, VIRTIO_CAP_ISR_SIZE,
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VIRTIO_PCI_CAP_ISR_CFG},
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{VIRTIO_CAP_DEVICE_OFFSET, VIRTIO_CAP_DEVICE_SIZE,
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VIRTIO_PCI_CAP_DEVICE_CFG},
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{VIRTIO_CAP_NOTIFY_OFFSET, VIRTIO_CAP_NOTIFY_SIZE,
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VIRTIO_PCI_CAP_NOTIFY_CFG},
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};
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static inline int
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virtio_get_cap_id(uint64_t offset, int size)
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{
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int i, rc = -1;
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for (i = 0; i < ARRAY_SIZE(cap_regions); i++) {
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if (offset >= cap_regions[i].cap_offset &&
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offset + size <= cap_regions[i].cap_offset +
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cap_regions[i].cap_size)
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return cap_regions[i].cap_id;
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}
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return rc;
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}
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static uint32_t
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virtio_common_cfg_read(struct pci_vdev *dev, uint64_t offset, int size)
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{
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/* TODO: to be implemented */
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return 0;
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}
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static void
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virtio_common_cfg_write(struct pci_vdev *dev, uint64_t offset, int size,
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uint64_t value)
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{
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/* TODO: to be implemented */
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}
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/* ignore driver writes to ISR region, and only support ISR region read */
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static uint32_t
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virtio_isr_cfg_read(struct pci_vdev *dev, uint64_t offset, int size)
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{
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/* TODO: to be implemented */
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return 0;
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}
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static uint32_t
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virtio_device_cfg_read(struct pci_vdev *dev, uint64_t offset, int size)
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{
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/* TODO: to be implemented */
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return 0;
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}
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static void
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virtio_device_cfg_write(struct pci_vdev *dev, uint64_t offset, int size,
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uint64_t value)
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{
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/* TODO: to be implemented */
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}
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/*
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* ignore driver reads from notify region, and only support notify region
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* write
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*/
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static void
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virtio_notify_cfg_write(struct pci_vdev *dev, uint64_t offset, int size,
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uint64_t value)
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{
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/* TODO: to be implemented */
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}
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static uint32_t
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virtio_pci_modern_mmio_read(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int baridx, uint64_t offset, int size)
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{
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struct virtio_base *base = dev->arg;
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struct virtio_ops *vops;
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const char *name;
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uint32_t value;
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int capid;
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assert(base->modern_mmio_bar_idx == baridx);
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vops = base->vops;
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name = vops->name;
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value = size == 1 ? 0xff : size == 2 ? 0xffff : 0xffffffff;
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if (size != 1 && size != 2 && size != 4) {
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fprintf(stderr,
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"%s: read from [%d:0x%lx] bad size %d\r\n",
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name, baridx, offset, size);
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return value;
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}
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capid = virtio_get_cap_id(offset, size);
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if (capid < 0) {
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fprintf(stderr,
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"%s: read from [%d:0x%lx] bad range %d\r\n",
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name, baridx, offset, size);
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return value;
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}
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if (base->mtx)
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pthread_mutex_lock(base->mtx);
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switch (capid) {
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case VIRTIO_PCI_CAP_COMMON_CFG:
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offset -= VIRTIO_CAP_COMMON_OFFSET;
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value = virtio_common_cfg_read(dev, offset, size);
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break;
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case VIRTIO_PCI_CAP_ISR_CFG:
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offset -= VIRTIO_CAP_ISR_OFFSET;
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value = virtio_isr_cfg_read(dev, offset, size);
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break;
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case VIRTIO_PCI_CAP_DEVICE_CFG:
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offset -= VIRTIO_CAP_DEVICE_OFFSET;
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value = virtio_device_cfg_read(dev, offset, size);
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break;
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default: /* guest driver should not read from notify region */
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fprintf(stderr,
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"%s: read from [%d:0x%lx] size %d not supported\r\n",
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name, baridx, offset, size);
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}
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if (base->mtx)
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pthread_mutex_unlock(base->mtx);
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return value;
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}
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static void
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virtio_pci_modern_mmio_write(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int baridx, uint64_t offset, int size,
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uint64_t value)
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{
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struct virtio_base *base = dev->arg;
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struct virtio_ops *vops;
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const char *name;
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int capid;
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assert(base->modern_mmio_bar_idx == baridx);
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vops = base->vops;
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name = vops->name;
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if (size != 1 && size != 2 && size != 4) {
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fprintf(stderr,
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"%s: write to [%d:0x%lx] bad size %d\r\n",
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name, baridx, offset, size);
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return;
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}
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capid = virtio_get_cap_id(offset, size);
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if (capid < 0) {
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fprintf(stderr,
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"%s: write to [%d:0x%lx] bad range %d\r\n",
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name, baridx, offset, size);
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return;
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}
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if (base->mtx)
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pthread_mutex_lock(base->mtx);
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switch (capid) {
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case VIRTIO_PCI_CAP_COMMON_CFG:
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offset -= VIRTIO_CAP_COMMON_OFFSET;
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virtio_common_cfg_write(dev, offset, size, value);
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break;
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case VIRTIO_PCI_CAP_DEVICE_CFG:
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offset -= VIRTIO_CAP_DEVICE_OFFSET;
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virtio_device_cfg_write(dev, offset, size, value);
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break;
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case VIRTIO_PCI_CAP_NOTIFY_CFG:
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offset -= VIRTIO_CAP_NOTIFY_OFFSET;
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virtio_notify_cfg_write(dev, offset, size, value);
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break;
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default: /* guest driver should not write to ISR region */
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fprintf(stderr,
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"%s: write to [%d:0x%lx] size %d not supported\r\n",
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name, baridx, offset, size);
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}
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if (base->mtx)
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pthread_mutex_unlock(base->mtx);
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}
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static uint32_t
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virtio_pci_modern_pio_read(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int baridx, uint64_t offset, int size)
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{
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struct virtio_base *base = dev->arg;
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assert(base->modern_pio_bar_idx == baridx);
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/* guest driver should not read notify pio */
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return 0;
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}
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static void
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virtio_pci_modern_pio_write(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int baridx, uint64_t offset, int size,
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uint64_t value)
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{
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struct virtio_base *base = dev->arg;
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struct virtio_vq_info *vq;
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struct virtio_ops *vops;
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const char *name;
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uint64_t idx;
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assert(base->modern_pio_bar_idx == baridx);
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vops = base->vops;
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name = vops->name;
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idx = value;
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if (size != 1 && size != 2 && size != 4) {
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fprintf(stderr,
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"%s: write to [%d:0x%lx] bad size %d\r\n",
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name, baridx, offset, size);
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return;
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}
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if (idx >= vops->nvq) {
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fprintf(stderr,
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"%s: queue %lu notify out of range\r\n", name, idx);
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return;
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}
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if (base->mtx)
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pthread_mutex_lock(base->mtx);
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vq = &base->queues[idx];
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if (vq->notify)
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(*vq->notify)(DEV_STRUCT(base), vq);
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else if (vops->qnotify)
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(*vops->qnotify)(DEV_STRUCT(base), vq);
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else
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fprintf(stderr,
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"%s: qnotify queue %lu: missing vq/vops notify\r\n",
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name, idx);
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if (base->mtx)
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pthread_mutex_unlock(base->mtx);
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}
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uint64_t
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virtio_pci_read(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int baridx, uint64_t offset, int size)
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{
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struct virtio_base *base = dev->arg;
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if (base->flags & VIRTIO_USE_MSIX) {
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if (baridx == pci_msix_table_bar(dev) ||
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baridx == pci_msix_pba_bar(dev)) {
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return pci_emul_msix_tread(dev, offset, size);
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}
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}
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if (baridx == base->legacy_pio_bar_idx)
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return virtio_pci_legacy_read(ctx, vcpu, dev, baridx,
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offset, size);
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if (baridx == base->modern_mmio_bar_idx)
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return virtio_pci_modern_mmio_read(ctx, vcpu, dev, baridx,
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offset, size);
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if (baridx == base->modern_pio_bar_idx)
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return virtio_pci_modern_pio_read(ctx, vcpu, dev, baridx,
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offset, size);
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fprintf(stderr, "%s: read unexpected baridx %d\r\n",
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base->vops->name, baridx);
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return size == 1 ? 0xff : size == 2 ? 0xffff : 0xffffffff;
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}
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void
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virtio_pci_write(struct vmctx *ctx, int vcpu, struct pci_vdev *dev,
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int baridx, uint64_t offset, int size, uint64_t value)
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{
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struct virtio_base *base = dev->arg;
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if (base->flags & VIRTIO_USE_MSIX) {
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if (baridx == pci_msix_table_bar(dev) ||
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baridx == pci_msix_pba_bar(dev)) {
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pci_emul_msix_twrite(dev, offset, size, value);
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return;
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}
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}
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if (baridx == base->legacy_pio_bar_idx) {
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virtio_pci_legacy_write(ctx, vcpu, dev, baridx,
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offset, size, value);
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return;
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}
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if (baridx == base->modern_mmio_bar_idx) {
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virtio_pci_modern_mmio_write(ctx, vcpu, dev, baridx,
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offset, size, value);
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return;
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}
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if (baridx == base->modern_pio_bar_idx) {
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virtio_pci_modern_pio_write(ctx, vcpu, dev, baridx,
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offset, size, value);
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return;
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}
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fprintf(stderr, "%s: write unexpected baridx %d\r\n",
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base->vops->name, baridx);
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}
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