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Update AGL and TME links per feedback
Signed-off-by: Amy Reyes <amy.reyes@intel.com>
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@ -285,7 +285,9 @@ following rules:
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Detailed configurations and policies are out of scope for this document.
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Detailed configurations and policies are out of scope for this document.
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For good references on OS system security hardening and enhancement,
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For good references on OS system security hardening and enhancement,
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see `Android security <https://source.android.com/security/>`_.
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see `AGL security
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<https://docs.automotivelinux.org/en/lamprey/#2_Architecture_Guides/2_Security_Blueprint/0_Overview/>`_
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and `Android security <https://source.android.com/security/>`_.
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Hypervisor Security Enhancement
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Hypervisor Security Enhancement
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===============================
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===============================
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@ -313,7 +315,7 @@ Background
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The ACRN hypervisor has ultimate access control of all the platform
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The ACRN hypervisor has ultimate access control of all the platform
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memory spaces (see :ref:`memmgt-hld`). Note that on the APL platform,
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memory spaces (see :ref:`memmgt-hld`). Note that on the APL platform,
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`SGX <https://www.intel.com/content/www/us/en/developer/tools/software-guard-extensions/overview.html>`_ and `TME
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`SGX <https://www.intel.com/content/www/us/en/developer/tools/software-guard-extensions/overview.html>`_ and `TME
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<https://software.intel.com/en-us/blogs/2017/12/22/intel-releases-new-technology-specification-for-memory-encryption>`_
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<https://itpeernetwork.intel.com/memory-encryption/>`_
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are not currently supported.
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are not currently supported.
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The hypervisor can read and write any physical memory space allocated
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The hypervisor can read and write any physical memory space allocated
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