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hv: mmu: add some API for guest page mode check
add is_long_mode to check whether the processor is operating in IA-32e mode add is_paging_enabled to check whether paging is enabled add is_pae to check whether physical address extension is enabled. Tracked-On: #1379 Signed-off-by: Li, Fei1 <fei1.li@intel.com>
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@ -59,10 +59,10 @@ enum vm_paging_mode get_vcpu_paging_mode(struct vcpu *vcpu)
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return PAGING_MODE_0_LEVEL;
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return PAGING_MODE_0_LEVEL;
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}
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}
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else if (cpu_mode == CPU_MODE_PROTECTED) {
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else if (cpu_mode == CPU_MODE_PROTECTED) {
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if ((vcpu_get_cr4(vcpu) & CR4_PAE) != 0U) {
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if (is_pae(vcpu)) {
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return PAGING_MODE_3_LEVEL;
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return PAGING_MODE_3_LEVEL;
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}
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}
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else if ((vcpu_get_cr0(vcpu) & CR0_PG) != 0U) {
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else if (is_paging_enabled(vcpu)) {
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return PAGING_MODE_2_LEVEL;
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return PAGING_MODE_2_LEVEL;
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}
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}
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return PAGING_MODE_0_LEVEL;
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return PAGING_MODE_0_LEVEL;
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@ -321,7 +321,7 @@ int create_vcpu(uint16_t pcpu_id, struct vm *vm, struct vcpu **rtn_vcpu_handle)
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static void set_vcpu_mode(struct vcpu *vcpu, uint32_t cs_attr)
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static void set_vcpu_mode(struct vcpu *vcpu, uint32_t cs_attr)
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{
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{
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if (vcpu_get_efer(vcpu) & MSR_IA32_EFER_LMA_BIT) {
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if (is_long_mode(vcpu)) {
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if (cs_attr & 0x2000) /* CS.L = 1 */
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if (cs_attr & 0x2000) /* CS.L = 1 */
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vcpu->arch_vcpu.cpu_mode = CPU_MODE_64BIT;
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vcpu->arch_vcpu.cpu_mode = CPU_MODE_64BIT;
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else
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else
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@ -305,7 +305,7 @@ static bool is_cr0_write_valid(struct vcpu *vcpu, uint64_t cr0)
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* CR0.PG = 1, CR4.PAE = 0 and IA32_EFER.LME = 1 is invalid.
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* CR0.PG = 1, CR4.PAE = 0 and IA32_EFER.LME = 1 is invalid.
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* CR0.PE = 0 and CR0.PG = 1 is invalid.
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* CR0.PE = 0 and CR0.PG = 1 is invalid.
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*/
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*/
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if (((cr0 & CR0_PG) != 0UL) && ((vcpu_get_cr4(vcpu) & CR4_PAE) == 0UL)
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if (((cr0 & CR0_PG) != 0UL) && !is_pae(vcpu)
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&& ((vcpu_get_efer(vcpu) & MSR_IA32_EFER_LME_BIT) != 0UL))
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&& ((vcpu_get_efer(vcpu) & MSR_IA32_EFER_LME_BIT) != 0UL))
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return false;
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return false;
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@ -348,7 +348,7 @@ void vmx_write_cr0(struct vcpu *vcpu, uint64_t cr0)
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{
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{
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uint64_t cr0_vmx;
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uint64_t cr0_vmx;
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uint32_t entry_ctrls;
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uint32_t entry_ctrls;
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bool paging_enabled = !!(vcpu_get_cr0(vcpu) & CR0_PG);
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bool paging_enabled = is_paging_enabled(vcpu);
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if (!is_cr0_write_valid(vcpu, cr0)) {
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if (!is_cr0_write_valid(vcpu, cr0)) {
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pr_dbg("Invalid cr0 write operation from guest");
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pr_dbg("Invalid cr0 write operation from guest");
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@ -287,6 +287,21 @@ uint64_t vcpu_get_pat_ext(struct vcpu *vcpu);
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void vcpu_set_pat_ext(struct vcpu *vcpu, uint64_t val);
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void vcpu_set_pat_ext(struct vcpu *vcpu, uint64_t val);
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void set_vcpu_regs(struct vcpu *vcpu, struct acrn_vcpu_regs *vcpu_regs);
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void set_vcpu_regs(struct vcpu *vcpu, struct acrn_vcpu_regs *vcpu_regs);
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static inline bool is_long_mode(struct vcpu *vcpu)
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{
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return (vcpu_get_efer(vcpu) & MSR_IA32_EFER_LMA_BIT) != 0UL;
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}
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static inline bool is_paging_enabled(struct vcpu *vcpu)
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{
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return (vcpu_get_cr0(vcpu) & CR0_PG) != 0UL;
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}
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static inline bool is_pae(struct vcpu *vcpu)
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{
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return (vcpu_get_cr4(vcpu) & CR4_PAE) != 0UL;
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}
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struct vcpu* get_ever_run_vcpu(uint16_t pcpu_id);
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struct vcpu* get_ever_run_vcpu(uint16_t pcpu_id);
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int create_vcpu(uint16_t pcpu_id, struct vm *vm, struct vcpu **rtn_vcpu_handle);
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int create_vcpu(uint16_t pcpu_id, struct vm *vm, struct vcpu **rtn_vcpu_handle);
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int run_vcpu(struct vcpu *vcpu);
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int run_vcpu(struct vcpu *vcpu);
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