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hv: vtd: cleanup snoop control related code
Snoop control will not be turned on by hypervisor, delete snoop control related code. Tracked-On: #4831 Signed-off-by: Binbin Wu <binbin.wu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
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@ -340,13 +340,6 @@ config MCE_ON_PSC_WORKAROUND_DISABLED
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the software workaround has negative impact on performance. If all the guest OS
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kernels are trusted, this option may be set for performance.
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config IOMMU_ENFORCE_SNP
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bool "IOMMU enforce snoop behavior of DMA operation"
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default n
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help
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GPU IOMMU doesn't support snoop control capability,
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To enable gvt-d,disable IOMMU snoop control by default.
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config ENFORCE_TURNOFF_AC
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bool "Force to disable #AC for Split-locked Access"
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default n
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@ -278,6 +278,11 @@ static inline uint8_t iommu_cap_rwbf(uint64_t cap)
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return ((uint8_t)(cap >> 4U) & 1U);
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}
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static inline uint8_t iommu_ecap_sc(uint64_t ecap)
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{
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return ((uint8_t)(ecap >> 7U) & 1U);
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}
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static void dmar_unit_show_capability(struct dmar_drhd_rt *dmar_unit)
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{
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pr_info("dmar unit[0x%x]", dmar_unit->drhd->reg_base_addr);
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@ -482,17 +487,6 @@ static int32_t dmar_register_hrhd(struct dmar_drhd_rt *dmar_unit)
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if ((iommu_ecap_c(dmar_unit->ecap) == 0U) && (!dmar_unit->drhd->ignore)) {
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iommu_page_walk_coherent = false;
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}
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/* when the hardware support snoop control,
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* to make sure snoop control is always enabled,
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* the SNP filed in the leaf PTE should be set.
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* How to guarantee it when EPT is used as second-level
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* translation paging structures?
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*/
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if (iommu_ecap_sc(dmar_unit->ecap) == 0U) {
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dev_dbg(DBG_LEVEL_IOMMU, "dmar uint doesn't support snoop control!");
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}
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dmar_disable_translation(dmar_unit);
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}
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@ -1020,10 +1014,6 @@ static int32_t iommu_attach_device(const struct iommu_domain *domain, uint8_t bu
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pr_err("invalid dmar unit");
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ret = -EINVAL;
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} else {
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if (iommu_ecap_sc(dmar_unit->ecap) == 0U) {
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dev_dbg(DBG_LEVEL_IOMMU, "vm=%d add %x:%x no snoop control!", domain->vm_id, bus, devfun);
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}
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root_table = (struct dmar_entry *)hpa2hva(dmar_unit->root_table_addr);
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root_entry = root_table + bus;
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@ -212,11 +212,6 @@ static inline uint8_t iommu_ecap_pt(uint64_t ecap)
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return ((uint8_t)(ecap >> 6U) & 1U);
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}
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static inline uint8_t iommu_ecap_sc(uint64_t ecap)
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{
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return ((uint8_t)(ecap >> 7U) & 1U);
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}
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static inline uint16_t iommu_ecap_iro(uint64_t ecap)
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{
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return ((uint16_t)(ecap >> 8U) & 0x3ffU);
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