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DM: increase vioapic pin count

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Current only 8 vioapic pins for pci irq (total 24 with 16 reserved),
which easily leads virtual GSI sharing with more and more passthrough
devices. This patch doulbes vioapic pin count and adds reboot hooks to
allocate from same pin after each reboot.

Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Edwin Zhai
2018-05-15 09:32:29 +08:00
committed by lijinxia
parent e1bb372763
commit 30549a59c7
6 changed files with 25 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files

29
devicemodel/hw/platform/ioapic.c
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@@ -36,6 +36,9 @@
#include "pci_core.h"
#include "lpc.h"
/* 16 IRQs reserved for kdb/mouse, COM1/2, RTC... */
#define LEGACY_IRQ_NUM 16
/*
* Assign PCI INTx interrupts to I/O APIC pins in a round-robin
* fashion. Note that we have no idea what the HPET is using, but the
@@ -46,29 +49,27 @@
* PCI devices.
*/
static int pci_pins;
static int last_pin;
void
ioapic_init(struct vmctx *ctx)
{
if (vm_ioapic_pincount(ctx, &pci_pins) < 0) {
pci_pins = 0;
return;
}
last_pin = 0;
/* Ignore the first 16 pins. */
if (pci_pins <= 16) {
pci_pins = 0;
return;
}
pci_pins -= 16;
/* Ignore the first 16 pins for legacy IRQ. */
pci_pins = VIOAPIC_RTE_NUM - LEGACY_IRQ_NUM;
}
void ioapic_deinit(void)
{
last_pin = 0;
}
int
ioapic_pci_alloc_irq(struct pci_vdev *dev)
{
static int last_pin;
/* No support of vGSI sharing */
assert(last_pin < pci_pins);
if (pci_pins == 0)
return -1;
return (16 + (last_pin++ % pci_pins));
return (LEGACY_IRQ_NUM + (last_pin++ % pci_pins));
}