From 30febed0e1a6c61434736b97d7c4ca61e99cfec5 Mon Sep 17 00:00:00 2001 From: Li Fei1 Date: Fri, 23 Apr 2021 15:49:53 +0800 Subject: [PATCH] hv: cache: wrap common APIs Wrap three common Cache APIs: - flush_invalidate_all_cache - flush_cacheline - flush_cache_range Tracked-On: #5830 Signed-off-by: Li Fei1 --- hypervisor/arch/x86/cpu.c | 5 +++-- hypervisor/arch/x86/guest/ept.c | 4 ++-- hypervisor/arch/x86/guest/vmexit.c | 2 +- hypervisor/arch/x86/mmu.c | 32 ++++++++++++++++----------- hypervisor/arch/x86/trampoline.c | 6 ++--- hypervisor/arch/x86/vtd.c | 6 +---- hypervisor/debug/dump.c | 2 +- hypervisor/include/arch/x86/asm/cpu.h | 2 +- hypervisor/include/arch/x86/asm/mmu.h | 15 ++++--------- 9 files changed, 34 insertions(+), 40 deletions(-) diff --git a/hypervisor/arch/x86/cpu.c b/hypervisor/arch/x86/cpu.c index 953a43699..8cf6e167c 100644 --- a/hypervisor/arch/x86/cpu.c +++ b/hypervisor/arch/x86/cpu.c @@ -31,6 +31,7 @@ #include #include #include +#include #define CPU_UP_TIMEOUT 100U /* millisecond */ #define CPU_DOWN_TIMEOUT 100U /* millisecond */ @@ -445,8 +446,8 @@ void cpu_dead(void) if (bitmap_test(pcpu_id, &pcpu_active_bitmap)) { /* clean up native stuff */ vmx_off(); - /* TODO: a cpu dead can't effect the RTVM which use Software SRAM */ - cache_flush_invalidate_all(); + + flush_cache_range((void *)get_hv_image_base(), CONFIG_HV_RAM_SIZE); /* Set state to show CPU is dead */ pcpu_set_current_state(pcpu_id, PCPU_STATE_DEAD); diff --git a/hypervisor/arch/x86/guest/ept.c b/hypervisor/arch/x86/guest/ept.c index 4bebaf993..ae14ecb78 100644 --- a/hypervisor/arch/x86/guest/ept.c +++ b/hypervisor/arch/x86/guest/ept.c @@ -371,7 +371,7 @@ void ept_flush_leaf_page(uint64_t *pge, uint64_t size) * flush [sw_sram_top, end_hpa) in the next if condition */ stac(); - flush_address_space(hpa2hva(base_hpa), min(end_hpa, sw_sram_bottom) - base_hpa); + flush_cache_range(hpa2hva(base_hpa), min(end_hpa, sw_sram_bottom) - base_hpa); clac(); } @@ -383,7 +383,7 @@ void ept_flush_leaf_page(uint64_t *pge, uint64_t size) * flush [base_hpa, sw_sram_bottom) in the below if condition */ stac(); - flush_address_space(hpa2hva(max(base_hpa, sw_sram_top)), end_hpa - max(base_hpa, sw_sram_top)); + flush_cache_range(hpa2hva(max(base_hpa, sw_sram_top)), end_hpa - max(base_hpa, sw_sram_top)); clac(); } } diff --git a/hypervisor/arch/x86/guest/vmexit.c b/hypervisor/arch/x86/guest/vmexit.c index 83281154a..c62e136e2 100644 --- a/hypervisor/arch/x86/guest/vmexit.c +++ b/hypervisor/arch/x86/guest/vmexit.c @@ -409,7 +409,7 @@ static int32_t wbinvd_vmexit_handler(struct acrn_vcpu *vcpu) /* GUEST_FLAG_RT has not set in post-launched RTVM before it has been created */ if ((!is_software_sram_enabled()) && (!has_rt_vm())) { - cache_flush_invalidate_all(); + flush_invalidate_all_cache(); } else { if (is_rt_vm(vcpu->vm)) { walk_ept_table(vcpu->vm, ept_flush_leaf_page); diff --git a/hypervisor/arch/x86/mmu.c b/hypervisor/arch/x86/mmu.c index 985791458..3f6096eee 100644 --- a/hypervisor/arch/x86/mmu.c +++ b/hypervisor/arch/x86/mmu.c @@ -301,19 +301,6 @@ void init_paging(void) enable_paging(); } -/* - * @pre: addr != NULL && size != 0 - */ -void flush_address_space(void *addr, uint64_t size) -{ - uint64_t n = 0UL; - - while (n < size) { - clflushopt((char *)addr + n); - n += CACHE_LINE_SIZE; - } -} - void flush_tlb(uint64_t addr) { invlpg(addr); @@ -327,3 +314,22 @@ void flush_tlb_range(uint64_t addr, uint64_t size) invlpg(linear_addr); } } + +void flush_invalidate_all_cache(void) +{ + wbinvd(); +} + +void flush_cacheline(const volatile void *p) +{ + clflush(p); +} + +void flush_cache_range(const volatile void *p, uint64_t size) +{ + uint64_t i; + + for (i = 0UL; i < size; i += CACHE_LINE_SIZE) { + clflushopt(p + i); + } +} diff --git a/hypervisor/arch/x86/trampoline.c b/hypervisor/arch/x86/trampoline.c index a7a02008b..9deb48170 100644 --- a/hypervisor/arch/x86/trampoline.c +++ b/hypervisor/arch/x86/trampoline.c @@ -107,7 +107,7 @@ static void update_trampoline_code_refs(uint64_t dest_pa) uint64_t prepare_trampoline(void) { - uint64_t size, dest_pa, i; + uint64_t size, dest_pa; size = (uint64_t)(&ld_trampoline_end - &ld_trampoline_start); dest_pa = e820_alloc_memory(CONFIG_LOW_RAM_SIZE, MEM_1M); @@ -120,9 +120,7 @@ uint64_t prepare_trampoline(void) update_trampoline_code_refs(dest_pa); cpu_memory_barrier(); - for (i = 0UL; i < size; i = i + CACHE_LINE_SIZE) { - clflush(hpa2hva(dest_pa + i)); - } + flush_cache_range(hpa2hva(dest_pa), size); trampoline_start16_paddr = dest_pa; diff --git a/hypervisor/arch/x86/vtd.c b/hypervisor/arch/x86/vtd.c index cebfa7a93..8d0348adc 100644 --- a/hypervisor/arch/x86/vtd.c +++ b/hypervisor/arch/x86/vtd.c @@ -264,13 +264,9 @@ static inline void dmar_wait_completion(const struct dmar_drhd_rt *dmar_unit, ui */ void iommu_flush_cache(const void *p, uint32_t size) { - uint32_t i; - /* if vtd support page-walk coherency, no need to flush cacheline */ if (!iommu_page_walk_coherent) { - for (i = 0U; i < size; i += CACHE_LINE_SIZE) { - clflush((const char *)p + i); - } + flush_cache_range(p, size); } } diff --git a/hypervisor/debug/dump.c b/hypervisor/debug/dump.c index 53a4648ef..9db4607ff 100644 --- a/hypervisor/debug/dump.c +++ b/hypervisor/debug/dump.c @@ -255,7 +255,7 @@ void dump_exception(struct intr_excp_ctx *ctx, uint16_t pcpu_id) /* Save registers*/ crash_ctx = ctx; - cache_flush_invalidate_all(); + flush_invalidate_all_cache(); /* Release lock to let other CPUs handle exception */ spinlock_release(&exception_spinlock); diff --git a/hypervisor/include/arch/x86/asm/cpu.h b/hypervisor/include/arch/x86/asm/cpu.h index 8e837be24..a1b4d806c 100644 --- a/hypervisor/include/arch/x86/asm/cpu.h +++ b/hypervisor/include/arch/x86/asm/cpu.h @@ -551,7 +551,7 @@ static inline void invlpg(unsigned long addr) asm volatile("invlpg (%0)" ::"r" (addr) : "memory"); } -static inline void cache_flush_invalidate_all(void) +static inline void wbinvd(void) { asm volatile (" wbinvd\n" : : : "memory"); } diff --git a/hypervisor/include/arch/x86/asm/mmu.h b/hypervisor/include/arch/x86/asm/mmu.h index 1abc08183..a573d1934 100644 --- a/hypervisor/include/arch/x86/asm/mmu.h +++ b/hypervisor/include/arch/x86/asm/mmu.h @@ -174,17 +174,6 @@ void flush_vpid_single(uint16_t vpid); */ void flush_vpid_global(void); -/** - * @brief Flush address space - * - * @param[in] addr the specified virtual address - * - * @param[in] size the specified size to flush - * - * @return None - */ -void flush_address_space(void *addr, uint64_t size); - /** * @brief Guest-physical mappings and combined mappings invalidation * @@ -206,6 +195,10 @@ static inline uint64_t get_pae_pdpt_addr(uint64_t cr3) void flush_tlb(uint64_t addr); void flush_tlb_range(uint64_t addr, uint64_t size); +void flush_invalidate_all_cache(void); +void flush_cacheline(const volatile void *p); +void flush_cache_range(const volatile void *p, uint64_t size); + /** * @} */