diff --git a/hypervisor/arch/x86/cat.c b/hypervisor/arch/x86/cat.c
index 587621596..bb5df16e5 100644
--- a/hypervisor/arch/x86/cat.c
+++ b/hypervisor/arch/x86/cat.c
@@ -18,6 +18,7 @@
 
 struct cat_hw_info cat_cap_info;
 const uint16_t hv_clos = 0U;
+static uint16_t platform_clos_num = MAX_PLATFORM_CLOS_NUM;
 
 int32_t init_cat_cap_info(void)
 {
diff --git a/hypervisor/arch/x86/configs/apl-mrb/board.c b/hypervisor/arch/x86/configs/apl-mrb/board.c
index 4f1fd286f..a3cac5953 100644
--- a/hypervisor/arch/x86/configs/apl-mrb/board.c
+++ b/hypervisor/arch/x86/configs/apl-mrb/board.c
@@ -13,6 +13,5 @@
 #endif
 
 struct dmar_info plat_dmar_info;
-struct platform_clos_info platform_clos_array[0];
-uint16_t platform_clos_num = 0;
+struct platform_clos_info platform_clos_array[MAX_PLATFORM_CLOS_NUM];
 const struct cpu_state_table board_cpu_state_tbl;
diff --git a/hypervisor/arch/x86/configs/apl-mrb/misc_cfg.h b/hypervisor/arch/x86/configs/apl-mrb/misc_cfg.h
index 297603bc2..9a88cbb91 100644
--- a/hypervisor/arch/x86/configs/apl-mrb/misc_cfg.h
+++ b/hypervisor/arch/x86/configs/apl-mrb/misc_cfg.h
@@ -8,6 +8,8 @@
 #define MISC_CFG_H
 
 #define CONFIG_MAX_PCPU_NUM	4U
+#define MAX_PLATFORM_CLOS_NUM	0U
+
 #define ROOTFS_0		"root=/dev/sda3 "
 #define ROOTFS_1		"root=/dev/mmcblk1p1 "
 
diff --git a/hypervisor/arch/x86/configs/apl-up2/board.c b/hypervisor/arch/x86/configs/apl-up2/board.c
index ccab657fb..ad5e51a94 100644
--- a/hypervisor/arch/x86/configs/apl-up2/board.c
+++ b/hypervisor/arch/x86/configs/apl-up2/board.c
@@ -15,25 +15,23 @@
 
 struct dmar_info plat_dmar_info;
 
-struct platform_clos_info platform_clos_array[4] = {
+struct platform_clos_info platform_clos_array[MAX_PLATFORM_CLOS_NUM] = {
 	{
 		.clos_mask = 0xff,
-		.msr_index = MSR_IA32_L2_MASK_0,
+		.msr_index = MSR_IA32_L2_MASK_BASE,
 	},
 	{
 		.clos_mask = 0xff,
-		.msr_index = MSR_IA32_L2_MASK_1,
+		.msr_index = MSR_IA32_L2_MASK_BASE + 1U,
 	},
 	{
 		.clos_mask = 0xff,
-		.msr_index = MSR_IA32_L2_MASK_2,
+		.msr_index = MSR_IA32_L2_MASK_BASE + 2U,
 	},
 	{
 		.clos_mask = 0xff,
-		.msr_index = MSR_IA32_L2_MASK_3,
+		.msr_index = MSR_IA32_L2_MASK_BASE + 3U,
 	},
 };
 
-uint16_t platform_clos_num = (uint16_t)(sizeof(platform_clos_array)/sizeof(struct platform_clos_info));
-
 const struct cpu_state_table board_cpu_state_tbl;
diff --git a/hypervisor/arch/x86/configs/apl-up2/misc_cfg.h b/hypervisor/arch/x86/configs/apl-up2/misc_cfg.h
index 859920058..162507731 100644
--- a/hypervisor/arch/x86/configs/apl-up2/misc_cfg.h
+++ b/hypervisor/arch/x86/configs/apl-up2/misc_cfg.h
@@ -8,6 +8,8 @@
 #define MISC_CFG_H
 
 #define CONFIG_MAX_PCPU_NUM	4U
+#define MAX_PLATFORM_CLOS_NUM	4U
+
 #define ROOTFS_0		"root=/dev/sda3 "
 #define ROOTFS_1		"root=/dev/mmcblk0p3 "
 
diff --git a/hypervisor/arch/x86/configs/dnv-cb2/board.c b/hypervisor/arch/x86/configs/dnv-cb2/board.c
index 4f1fd286f..a3cac5953 100644
--- a/hypervisor/arch/x86/configs/dnv-cb2/board.c
+++ b/hypervisor/arch/x86/configs/dnv-cb2/board.c
@@ -13,6 +13,5 @@
 #endif
 
 struct dmar_info plat_dmar_info;
-struct platform_clos_info platform_clos_array[0];
-uint16_t platform_clos_num = 0;
+struct platform_clos_info platform_clos_array[MAX_PLATFORM_CLOS_NUM];
 const struct cpu_state_table board_cpu_state_tbl;
diff --git a/hypervisor/arch/x86/configs/dnv-cb2/misc_cfg.h b/hypervisor/arch/x86/configs/dnv-cb2/misc_cfg.h
index 8bc0dd240..1d09f2b5e 100644
--- a/hypervisor/arch/x86/configs/dnv-cb2/misc_cfg.h
+++ b/hypervisor/arch/x86/configs/dnv-cb2/misc_cfg.h
@@ -8,6 +8,8 @@
 #define MISC_CFG_H
 
 #define CONFIG_MAX_PCPU_NUM	8U
+#define MAX_PLATFORM_CLOS_NUM	0U
+
 #define ROOTFS_0		"root=/dev/sda3 "
 
 #define SOS_ROOTFS		ROOTFS_0
diff --git a/hypervisor/arch/x86/configs/generic/board.c b/hypervisor/arch/x86/configs/generic/board.c
index 4f1fd286f..a3cac5953 100644
--- a/hypervisor/arch/x86/configs/generic/board.c
+++ b/hypervisor/arch/x86/configs/generic/board.c
@@ -13,6 +13,5 @@
 #endif
 
 struct dmar_info plat_dmar_info;
-struct platform_clos_info platform_clos_array[0];
-uint16_t platform_clos_num = 0;
+struct platform_clos_info platform_clos_array[MAX_PLATFORM_CLOS_NUM];
 const struct cpu_state_table board_cpu_state_tbl;
diff --git a/hypervisor/arch/x86/configs/generic/misc_cfg.h b/hypervisor/arch/x86/configs/generic/misc_cfg.h
index 484e324f4..340647af2 100644
--- a/hypervisor/arch/x86/configs/generic/misc_cfg.h
+++ b/hypervisor/arch/x86/configs/generic/misc_cfg.h
@@ -8,6 +8,8 @@
 #define MISC_CFG_H
 
 #define CONFIG_MAX_PCPU_NUM	4U
+#define MAX_PLATFORM_CLOS_NUM	0U
+
 #define ROOTFS_0		"root=/dev/sda3 "
 #define ROOTFS_1		"root=/dev/mmcblk0p1 "
 
diff --git a/hypervisor/arch/x86/configs/icl-rvp/board.c b/hypervisor/arch/x86/configs/icl-rvp/board.c
index e64158516..a3cac5953 100644
--- a/hypervisor/arch/x86/configs/icl-rvp/board.c
+++ b/hypervisor/arch/x86/configs/icl-rvp/board.c
@@ -13,5 +13,5 @@
 #endif
 
 struct dmar_info plat_dmar_info;
-struct platform_clos_info platform_clos_array[0];
-uint16_t platform_clos_num = 0;
+struct platform_clos_info platform_clos_array[MAX_PLATFORM_CLOS_NUM];
+const struct cpu_state_table board_cpu_state_tbl;
diff --git a/hypervisor/arch/x86/configs/nuc6cayh/board.c b/hypervisor/arch/x86/configs/nuc6cayh/board.c
index 4f1fd286f..a3cac5953 100644
--- a/hypervisor/arch/x86/configs/nuc6cayh/board.c
+++ b/hypervisor/arch/x86/configs/nuc6cayh/board.c
@@ -13,6 +13,5 @@
 #endif
 
 struct dmar_info plat_dmar_info;
-struct platform_clos_info platform_clos_array[0];
-uint16_t platform_clos_num = 0;
+struct platform_clos_info platform_clos_array[MAX_PLATFORM_CLOS_NUM];
 const struct cpu_state_table board_cpu_state_tbl;
diff --git a/hypervisor/arch/x86/configs/nuc6cayh/misc_cfg.h b/hypervisor/arch/x86/configs/nuc6cayh/misc_cfg.h
index 5482a2caf..aaa23ae16 100644
--- a/hypervisor/arch/x86/configs/nuc6cayh/misc_cfg.h
+++ b/hypervisor/arch/x86/configs/nuc6cayh/misc_cfg.h
@@ -8,6 +8,8 @@
 #define MISC_CFG_H
 
 #define CONFIG_MAX_PCPU_NUM	4U
+#define MAX_PLATFORM_CLOS_NUM	0U
+
 #define ROOTFS_0		"root=/dev/sda3 "
 
 #define SOS_ROOTFS		ROOTFS_0
diff --git a/hypervisor/arch/x86/configs/nuc7i7dnb/board.c b/hypervisor/arch/x86/configs/nuc7i7dnb/board.c
index a114a1072..5951121c3 100644
--- a/hypervisor/arch/x86/configs/nuc7i7dnb/board.c
+++ b/hypervisor/arch/x86/configs/nuc7i7dnb/board.c
@@ -55,6 +55,5 @@ struct dmar_info plat_dmar_info = {
 	.drhd_units = drhd_info_array,
 };
 
-struct platform_clos_info platform_clos_array[0];
-uint16_t platform_clos_num = 0;
+struct platform_clos_info platform_clos_array[MAX_PLATFORM_CLOS_NUM];
 const struct cpu_state_table board_cpu_state_tbl;
diff --git a/hypervisor/arch/x86/configs/nuc7i7dnb/misc_cfg.h b/hypervisor/arch/x86/configs/nuc7i7dnb/misc_cfg.h
index 1665273b3..c47a1bfaa 100644
--- a/hypervisor/arch/x86/configs/nuc7i7dnb/misc_cfg.h
+++ b/hypervisor/arch/x86/configs/nuc7i7dnb/misc_cfg.h
@@ -8,6 +8,8 @@
 #define MISC_CFG_H
 
 #define CONFIG_MAX_PCPU_NUM	4U
+#define MAX_PLATFORM_CLOS_NUM	0U
+
 #define ROOTFS_0		"root=/dev/sda3 "
 #define ROOTFS_1		"root=/dev/nvme0n1p3 "
 
diff --git a/hypervisor/arch/x86/guest/vmsr.c b/hypervisor/arch/x86/guest/vmsr.c
index ca88e2652..e77415b3b 100644
--- a/hypervisor/arch/x86/guest/vmsr.c
+++ b/hypervisor/arch/x86/guest/vmsr.c
@@ -337,7 +337,7 @@ void init_msr_emulation(struct acrn_vcpu *vcpu)
 	}
 
 	/* RDT-A disabled: CPUID.07H.EBX[12], CPUID.10H */
-	for (msr = MSR_IA32_L3_MASK_0; msr < MSR_IA32_BNDCFGS; msr++) {
+	for (msr = MSR_IA32_L3_MASK_BASE; msr < MSR_IA32_BNDCFGS; msr++) {
 		enable_msr_interception(msr_bitmap, msr, INTERCEPT_READ_WRITE);
 	}
 
diff --git a/hypervisor/include/arch/x86/board.h b/hypervisor/include/arch/x86/board.h
index 0d7cebd81..cab5069be 100644
--- a/hypervisor/include/arch/x86/board.h
+++ b/hypervisor/include/arch/x86/board.h
@@ -7,6 +7,7 @@
 #define BOARD_H
 
 #include <types.h>
+#include <misc_cfg.h>
 #include <host_pm.h>
 
 /* forward declarations */
@@ -18,8 +19,7 @@ struct platform_clos_info {
 };
 
 extern struct dmar_info plat_dmar_info;
-extern struct platform_clos_info platform_clos_array[];
-extern uint16_t platform_clos_num;
+extern struct platform_clos_info platform_clos_array[MAX_PLATFORM_CLOS_NUM];
 extern const struct cpu_state_table board_cpu_state_tbl;
 
 /* board specific functions */
diff --git a/hypervisor/include/arch/x86/msr.h b/hypervisor/include/arch/x86/msr.h
index e953329e8..149baa3b7 100644
--- a/hypervisor/include/arch/x86/msr.h
+++ b/hypervisor/include/arch/x86/msr.h
@@ -335,15 +335,12 @@
 #define MSR_IA32_QM_EVTSEL			0x00000C8DU
 #define MSR_IA32_QM_CTR				0x00000C8EU
 #define MSR_IA32_PQR_ASSOC			0x00000C8FU
-#define MSR_IA32_L3_MASK_0			0x00000C90U
+#define MSR_IA32_L3_MASK_BASE			0x00000C90U
 #define MSR_IA32_XSS				0x00000DA0U
 #define MSR_IA32_PKG_HDC_CTL			0x00000DB0U
 #define MSR_IA32_PM_CTL1			0x00000DB1U
 #define MSR_IA32_THREAD_STALL			0x00000DB2U
-#define MSR_IA32_L2_MASK_0			0x00000D10U
-#define MSR_IA32_L2_MASK_1			0x00000D11U
-#define MSR_IA32_L2_MASK_2			0x00000D12U
-#define MSR_IA32_L2_MASK_3			0x00000D13U
+#define MSR_IA32_L2_MASK_BASE			0x00000D10U
 #define MSR_IA32_BNDCFGS			0x00000D90U
 #define MSR_IA32_EFER				0xC0000080U
 #define MSR_IA32_STAR				0xC0000081U