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hv: dm: Use new pci device passthrough management ioctls

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IC_ASSIGN_PCIDEV		->	ACRN_IOCTL_ASSIGN_PCIDEV
IC_DEASSIGN_PCIDEV		->	ACRN_IOCTL_DEASSIGN_PCIDEV
QUIRK_PTDEV			->	ACRN_PTDEV_QUIRK_ASSIGN
struct acrn_assign_pcidev	->	struct acrn_pcidev

Move struct acrn_pcidev into acrn_common.h because it is used by both
DM and HV.

Tracked-On: #6282
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
This commit is contained in:
Shuo A Liu
2021-07-07 16:34:22 +08:00
committed by wenlingz
parent 9d67745037
commit 3625eb7a99
11 changed files with 58 additions and 92 deletions
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40
devicemodel/include/public/hsm_ioctl_defs.h
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@@ -117,9 +117,10 @@
_IOW(ACRN_IOCTL_TYPE, 0x53, struct acrn_ptdev_irq)
#define ACRN_IOCTL_RESET_PTDEV_INTR \
_IOW(ACRN_IOCTL_TYPE, 0x54, struct acrn_ptdev_irq)
#define IC_RESET_PTDEV_INTR_INFO _IC_ID(IC_ID, IC_ID_PCI_BASE + 0x04)
#define IC_ASSIGN_PCIDEV _IC_ID(IC_ID, IC_ID_PCI_BASE + 0x05)
#define IC_DEASSIGN_PCIDEV _IC_ID(IC_ID, IC_ID_PCI_BASE + 0x06)
#define ACRN_IOCTL_ASSIGN_PCIDEV \
_IOW(ACRN_IOCTL_TYPE, 0x55, struct acrn_pcidev)
#define ACRN_IOCTL_DEASSIGN_PCIDEV \
_IOW(ACRN_IOCTL_TYPE, 0x56, struct acrn_pcidev)
#define IC_ASSIGN_MMIODEV _IC_ID(IC_ID, IC_ID_PCI_BASE + 0x07)
#define IC_DEASSIGN_MMIODEV _IC_ID(IC_ID, IC_ID_PCI_BASE + 0x08)
#define IC_ADD_HV_VDEV _IC_ID(IC_ID, IC_ID_PCI_BASE + 0x09)
@@ -179,39 +180,6 @@ struct acrn_vm_memmap {
__u64 len;
};
/**
* @brief Info to assign or deassign PCI for a VM
*
*/
struct acrn_assign_pcidev {
#define QUIRK_PTDEV (1 << 0) /* We will only handle general part in HV, others in DM */
/** the type of the the pass-through PCI device */
uint32_t type;
/** virtual BDF# of the pass-through PCI device */
uint16_t virt_bdf;
/** physical BDF# of the pass-through PCI device */
uint16_t phys_bdf;
/** the PCI Interrupt Line, initialized by ACRN-DM, which is RO and
* ideally not used for pass-through MSI/MSI-x devices.
*/
uint8_t intr_line;
/** the PCI Interrupt Pin, initialized by ACRN-DM, which is RO and
* ideally not used for pass-through MSI/MSI-x devices.
*/
uint8_t intr_pin;
/** the base address of the PCI BAR, initialized by ACRN-DM. */
uint32_t bar[6];
/** reserved for extension */
uint32_t rsvd2[6];
} __attribute__((aligned(8)));
/**
* @brief Info to assign or deassign a MMIO device for a VM
*/