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hv: fix integer violations

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- Fix the integer violations related to the following rules:
  1. The operands to shift operations (<<, >>) shall be unsigned
     integers.
  2. The operands to bit operations (&, |, ~) shall be unsigned
     integers.

- Replace 12U with CPU_PAGE_SHIFT when it is address shift case.

v1 -> v2:
 * use existed MACRO to get bus/slot/func values
 * update PCI_SLOT MACRO to make it more straightforward
 * remove the incorrect replacement of 12U with CPU_PAGE_SHIFT
   dmar_fault_msi_write

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Shiqing Gao
2018-11-06 08:41:54 +08:00
committed by lijinxia
parent 65a2613ab6
commit 366042cac2
10 changed files with 20 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
hypervisor/arch/x86/assign.c
View File

@@ -97,7 +97,7 @@ static void ptdev_build_physical_msi(struct acrn_vm *vm, struct ptdev_msi_info *
/* update physical dest mode & dest field */
info->pmsi_addr = info->vmsi_addr;
info->pmsi_addr &= ~0xFF00CU;
info->pmsi_addr |= (dest_mask << 12U) | MSI_ADDR_RH | MSI_ADDR_LOG;
info->pmsi_addr |= (dest_mask << CPU_PAGE_SHIFT) | MSI_ADDR_RH | MSI_ADDR_LOG;
dev_dbg(ACRN_DBG_IRQ, "MSI addr:data = 0x%llx:%x(V) -> 0x%llx:%x(P)",
info->vmsi_addr, info->vmsi_data,
@@ -578,13 +578,9 @@ int ptdev_msix_remap(struct acrn_vm *vm, uint16_t virt_bdf,
ptdev_build_physical_msi(vm, info, irq_to_vector(entry->allocated_pirq));
entry->msi = *info;
dev_dbg(ACRN_DBG_IRQ,
"PCI %x:%x.%x MSI VR[%d] 0x%x->0x%x assigned to vm%d",
(virt_bdf >> 8) & 0xFFU, (virt_bdf >> 3) & 0x1FU,
(virt_bdf) & 0x7U, entry_nr,
info->vmsi_data & 0xFFU,
irq_to_vector(entry->allocated_pirq),
entry->vm->vm_id);
dev_dbg(ACRN_DBG_IRQ, "PCI %x:%x.%x MSI VR[%d] 0x%x->0x%x assigned to vm%d",
PCI_BUS(virt_bdf), PCI_SLOT(virt_bdf), PCI_FUNC(virt_bdf), entry_nr,
info->vmsi_data & 0xFFU, irq_to_vector(entry->allocated_pirq), entry->vm->vm_id);
END:
return 0;
}

2
hypervisor/arch/x86/guest/guest.c
View File

@@ -294,7 +294,7 @@ int gva2gpa(struct acrn_vcpu *vcpu, uint64_t gva, uint64_t *gpa,
* So we use DPL of SS access rights field for guest DPL.
*/
pw_info.is_user_mode_access =
(((exec_vmread32(VMX_GUEST_SS_ATTR)>>5) & 0x3U) == 3U);
(((exec_vmread32(VMX_GUEST_SS_ATTR) >> 5U) & 0x3U) == 3U);
pw_info.pse = true;
pw_info.nxe = ((vcpu_get_efer(vcpu) & MSR_IA32_EFER_NXE_BIT) != 0UL);
pw_info.wp = ((vcpu_get_cr0(vcpu) & CR0_WP) != 0UL);

2
hypervisor/arch/x86/guest/instr_emul.c
View File

@@ -392,7 +392,7 @@ static void get_guest_paging_info(struct acrn_vcpu *vcpu, struct instr_emul_ctxt
{
uint8_t cpl;
cpl = (uint8_t)((csar >> 5) & 3U);
cpl = (uint8_t)((csar >> 5U) & 3U);
emul_ctxt->paging.cr3 = exec_vmread(VMX_GUEST_CR3);
emul_ctxt->paging.cpl = cpl;
emul_ctxt->paging.cpu_mode = get_vcpu_mode(vcpu);

6
hypervisor/arch/x86/guest/vcpu.c
View File

@@ -167,10 +167,12 @@ static void set_vcpu_mode(struct acrn_vcpu *vcpu, uint32_t cs_attr, uint64_t ia3
uint64_t cr0)
{
if (ia32_efer & MSR_IA32_EFER_LMA_BIT) {
if (cs_attr & 0x2000) /* CS.L = 1 */
if (cs_attr & 0x2000U) {
/* CS.L = 1 */
vcpu->arch.cpu_mode = CPU_MODE_64BIT;
else
} else {
vcpu->arch.cpu_mode = CPU_MODE_COMPATIBILITY;
}
} else if (cr0 & CR0_PE) {
vcpu->arch.cpu_mode = CPU_MODE_PROTECTED;
} else {

2
hypervisor/arch/x86/vtd.c
View File

@@ -1037,7 +1037,7 @@ static int add_iommu_device(const struct iommu_domain *domain, uint16_t segment,
lower = dmar_set_bitslice(lower,
CTX_ENTRY_LOWER_SLPTPTR_MASK,
CTX_ENTRY_LOWER_SLPTPTR_POS,
domain->trans_table_ptr >> 12U);
domain->trans_table_ptr >> CPU_PAGE_SHIFT);
lower = dmar_set_bitslice(lower,
CTX_ENTRY_LOWER_P_MASK,
CTX_ENTRY_LOWER_P_POS,