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https://github.com/projectacrn/acrn-hypervisor.git
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hv: lib: refine inline assembly use in bitmap operation
Try to minimize the C code in inline assembly function. Now only construct data structure and return a value is permitted. Tracked-On: #861 Signed-off-by: Li, Fei1 <fei1.li@intel.com>
This commit is contained in:
Li, Fei1
wenlingz
parent
ddd07b955b
commit
36dcb0f605
@ -46,12 +46,12 @@ static uint16_t vmx_vpid_nr = VMX_MIN_NR_VPID;
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#define INVEPT_TYPE_ALL_CONTEXTS 2UL
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#define VMFAIL_INVALID_EPT_VPID \
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" jnc 1f\n" \
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" movl $1, (%0)\n" /* CF: error = 1 */ \
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" mov $1, %0\n" /* CF: error = 1 */ \
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" jmp 3f\n" \
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"1: jnz 2f\n" \
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" movl $2, (%0)\n" /* ZF: error = 2 */ \
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" mov $2, %0\n" /* ZF: error = 2 */ \
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" jmp 3f\n" \
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"2: movl $0, (%0)\n" \
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"2: mov $0, %0\n" \
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"3:"
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struct invvpid_operand {
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@ -66,13 +66,15 @@ struct invept_desc {
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uint64_t res;
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};
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static inline void asm_invvpid(const struct invvpid_operand operand, uint64_t type, int32_t *error)
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static inline int32_t asm_invvpid(const struct invvpid_operand operand, uint64_t type)
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{
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int32_t error;
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asm volatile ("invvpid %1, %2\n"
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VMFAIL_INVALID_EPT_VPID
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: "+r" (error)
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: "=r" (error)
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: "m" (operand), "r" (type)
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: "memory");
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return error;
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}
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/*
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@ -80,24 +82,22 @@ static inline void asm_invvpid(const struct invvpid_operand operand, uint64_t ty
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*/
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static inline void local_invvpid(uint64_t type, uint16_t vpid, uint64_t gva)
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{
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int32_t error = 0;
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const struct invvpid_operand operand = { vpid, 0U, 0U, gva };
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asm_invvpid(operand, type, &error);
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if (error != 0) {
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if (asm_invvpid(operand, type) != 0) {
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pr_dbg("%s, failed. type = %llu, vpid = %u", __func__, type, vpid);
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}
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}
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static inline void asm_invept(uint64_t type, struct invept_desc desc, int32_t *error)
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static inline int32_t asm_invept(uint64_t type, struct invept_desc desc)
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{
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int32_t error;
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asm volatile ("invept %1, %2\n"
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VMFAIL_INVALID_EPT_VPID
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: "+r" (error)
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: "=r" (error)
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: "m" (desc), "r" (type)
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: "memory");
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return error;
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}
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/*
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@ -105,11 +105,7 @@ static inline void asm_invept(uint64_t type, struct invept_desc desc, int32_t *e
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*/
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static inline void local_invept(uint64_t type, struct invept_desc desc)
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{
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int32_t error = 0;
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asm_invept(type, desc, &error);
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if (error != 0) {
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if (asm_invept(type, desc) != 0) {
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pr_dbg("%s, failed. type = %llu, eptp = 0x%llx", __func__, type, desc.eptp);
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}
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}
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@ -292,22 +292,18 @@ static inline uint64_t sidt(void)
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}
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/* Read MSR */
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static inline void cpu_msr_read(uint32_t reg, uint64_t *msr_val_ptr)
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static inline uint64_t cpu_msr_read(uint32_t reg)
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{
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uint32_t msrl, msrh;
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asm volatile (" rdmsr ":"=a"(msrl), "=d"(msrh) : "c" (reg));
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*msr_val_ptr = ((uint64_t)msrh << 32U) | msrl;
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return (((uint64_t)msrh << 32U) | msrl);
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}
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/* Write MSR */
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static inline void cpu_msr_write(uint32_t reg, uint64_t msr_val)
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{
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uint32_t msrl, msrh;
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msrl = (uint32_t)msr_val;
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msrh = (uint32_t)(msr_val >> 32U);
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asm volatile (" wrmsr " : : "c" (reg), "a" (msrl), "d" (msrh));
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asm volatile (" wrmsr " : : "c" (reg), "a" ((uint32_t)msr_val), "d" ((uint32_t)(msr_val >> 32U)));
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}
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static inline void pause_cpu(void)
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@ -429,8 +425,7 @@ static inline uint64_t cpu_rsp_get(void)
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{
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uint64_t ret;
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asm volatile("movq %%rsp, %0"
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: "=r"(ret));
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asm volatile("movq %%rsp, %0" : "=r"(ret));
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return ret;
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}
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@ -438,34 +433,23 @@ static inline uint64_t cpu_rbp_get(void)
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{
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uint64_t ret;
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asm volatile("movq %%rbp, %0"
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: "=r"(ret));
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asm volatile("movq %%rbp, %0" : "=r"(ret));
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return ret;
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}
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static inline uint64_t
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msr_read(uint32_t reg_num)
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static inline uint64_t msr_read(uint32_t reg_num)
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{
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uint64_t msr_val;
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cpu_msr_read(reg_num, &msr_val);
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return msr_val;
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return cpu_msr_read(reg_num);
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}
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static inline void
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msr_write(uint32_t reg_num, uint64_t value64)
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static inline void msr_write(uint32_t reg_num, uint64_t value64)
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{
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cpu_msr_write(reg_num, value64);
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}
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static inline void
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write_xcr(int32_t reg, uint64_t val)
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static inline void write_xcr(int32_t reg, uint64_t val)
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{
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uint32_t low, high;
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low = (uint32_t)val;
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high = (uint32_t)(val >> 32U);
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asm volatile("xsetbv" : : "c" (reg), "a" (low), "d" (high));
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asm volatile("xsetbv" : : "c" (reg), "a" ((uint32_t)val), "d" ((uint32_t)(val >> 32U)));
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}
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static inline void stac(void)
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@ -39,7 +39,7 @@
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**/
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#define INVALID_BIT_INDEX 0xffffU
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/**
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/*
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*
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* fls32 - Find the Last (most significant) bit Set in value and
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* return the bit index of that bit.
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@ -61,33 +61,30 @@
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* when 'value' was zero, bit operations function can't find bit
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* set and return the invalid bit index directly.
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*
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* **/
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*/
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static inline uint16_t fls32(uint32_t value)
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{
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uint32_t ret = 0U;
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if (value == 0U) {
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return (INVALID_BIT_INDEX);
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}
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asm volatile("bsrl %1,%0"
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: "=r" (ret)
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: "rm" (value));
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uint32_t ret;
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asm volatile("bsrl %1,%0\n\t"
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"jnz 1f\n\t"
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"mov %2,%0\n"
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"1:" : "=r" (ret)
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: "rm" (value), "i" (INVALID_BIT_INDEX));
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return (uint16_t)ret;
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}
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static inline uint16_t fls64(uint64_t value)
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{
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uint64_t ret = 0UL;
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if (value == 0UL) {
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ret = (INVALID_BIT_INDEX);
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} else {
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asm volatile("bsrq %1,%0"
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: "=r" (ret)
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: "rm" (value));
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}
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asm volatile("bsrq %1,%0\n\t"
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"jnz 1f\n\t"
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"mov %2,%0\n"
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"1:" : "=r" (ret)
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: "rm" (value), "i" (INVALID_BIT_INDEX));
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return (uint16_t)ret;
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}
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/**
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/*
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*
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* ffs64 - Find the First (least significant) bit Set in value(Long type)
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* and return the index of that bit.
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@ -111,16 +108,15 @@ static inline uint16_t fls64(uint64_t value)
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* when 'value' was zero, bit operations function can't find bit
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* set and return the invalid bit index directly.
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*
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* **/
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*/
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static inline uint16_t ffs64(uint64_t value)
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{
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uint64_t ret = 0UL;
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if (value == 0UL) {
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return (INVALID_BIT_INDEX);
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}
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asm volatile("bsfq %1,%0"
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: "=r" (ret)
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: "rm" (value));
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uint64_t ret;
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asm volatile("bsfq %1,%0\n\t"
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"jnz 1f\n\t"
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"mov %2,%0\n"
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"1:" : "=r" (ret)
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: "rm" (value), "i" (INVALID_BIT_INDEX));
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return (uint16_t)ret;
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}
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@ -147,7 +143,7 @@ static inline uint64_t ffz64_ex(const uint64_t *addr, uint64_t size)
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return size;
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}
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/**
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/*
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* Counts leading zeros.
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*
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* The number of leading zeros is defined as the number of
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@ -171,7 +167,7 @@ static inline uint16_t clz(uint32_t value)
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}
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}
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/**
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/*
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* Counts leading zeros (64 bit version).
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*
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* @param value:The 64 bit value to count the number of leading zeros.
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@ -232,26 +228,22 @@ build_bitmap_clear(bitmap32_clear_lock, "l", uint32_t, BUS_LOCK)
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* Note:Input parameter nr shall be less than 64. If nr>=64, it will
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* be truncated.
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*/
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static inline bool bitmap_test(uint16_t nr_arg, const volatile uint64_t *addr)
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static inline bool bitmap_test(uint16_t nr, const volatile uint64_t *addr)
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{
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uint16_t nr;
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int32_t ret = 0;
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nr = nr_arg & 0x3fU;
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asm volatile("btq %q2,%1\n\tsbbl %0, %0"
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: "=r" (ret)
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: "m" (*addr), "r" ((uint64_t)nr)
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: "m" (*addr), "r" ((uint64_t)(nr & 0x3fU))
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: "cc", "memory");
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return (ret != 0);
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}
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static inline bool bitmap32_test(uint16_t nr_arg, const volatile uint32_t *addr)
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static inline bool bitmap32_test(uint16_t nr, const volatile uint32_t *addr)
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{
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uint16_t nr;
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int32_t ret = 0;
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nr = nr_arg & 0x1fU;
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asm volatile("btl %2,%1\n\tsbbl %0, %0"
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: "=r" (ret)
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: "m" (*addr), "r" ((uint32_t)nr)
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: "m" (*addr), "r" ((uint32_t)(nr & 0x1fU))
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: "cc", "memory");
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return (ret != 0);
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}
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