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Doc: Grammatical/style edits to split device model page

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Signed-off-by: Deb Taylor <deb.taylor@intel.com>
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Deb Taylor 2020-03-29 22:10:55 -04:00 committed by deb-intel
parent 86aa338a5f
commit 37291fa890
2 changed files with 23 additions and 22 deletions
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8
doc/developer-guides/hld/hv-dev-passthrough.rst
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@ -155,10 +155,10 @@ directly. EPT mapping is not built for these pages having MSI-X table.
Device configuration emulation Device configuration emulation
****************************** ******************************
PCI configuration space could been accessed by PCI-compatible Configuration Mechanism The PCI configuration space can be accessed by a PCI-compatible
(IO port 0xCF8/CFC) and PCI Express Enhanced Configuration Access Mechanism (PCI MMCONFIG). Configuration Mechanism (IO port 0xCF8/CFC) and the PCI Express Enhanced
ACRN hypervisor will trap these PCI configuration space access and emulate it. You may refer Configuration Access Mechanism (PCI MMCONFIG). The ACRN hypervisor traps
to :ref:`split-device-model` for detail. this PCI configuration space access and emulate it. Refer to :ref:`split-device-model` for details.
MSI-X table emulation MSI-X table emulation
********************* *********************

35
doc/developer-guides/hld/split-dm.rst
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@ -3,34 +3,35 @@
Split Device Model Split Device Model
================== ==================
We usually emulate device in Device Model. However, we need to emulate device in We usually emulate devices in the Device Model. However, in some cases, we
ACRN Hypervisor for some reasons. For example, post-launched RTVM needs to emulate need to emulate devices in the ACRN Hypervisor. For example, the
pass through PCI(e) devices in ACRN Hypervisor in which case it could continue to post-launched RTVM needs to emulate passthrough PCI(e) devices in the ACRN
running even if the Device Model is killed. In spite of this, the Device Model still Hypervisor so that it can continue to run even if the Device Model is
should own the overall resouce management like memroy/MMIO space, interrupt pin etc. no longer working. In spite of this, the Device Model still owns the overall
So there shall be one communication method provided by ACRN Hypervisor, which used resource management such as memory/MMIO space, interrupt pin, etc.
to align the resource information for Device Model to ACRN Hypervisor emulated device.
Let's still take the pass through PCI(e) device as an example: One communication method provided by the ACRN Hypervisor aligns the resource information for the Device Model with the ACRN Hypervisor emulated device.
Before we split pass through PCI(e) device from Device Model to ACRN Hypervisor, the
whole picture is like this: Let's take the passthrough PCI(e) device as an example. Before we split
passthrough PCI(e) devices from the Device Model to the ACRN Hypervisor, the
whole picture looks like this:
.. figure:: images/split-dm-image1.png .. figure:: images/split-dm-image1.png
:align: center :align: center
:width: 900px :width: 900px
:name: split-dm-architecture-overview1 :name: split-dm-architecture-overview1
PCI Config space access in Service VM or Pre-launched VM PCI Config space access in the Service VM or Pre-launched VM
.. figure:: images/split-dm-image2.png .. figure:: images/split-dm-image2.png
:align: center :align: center
:width: 900px :width: 900px
:name: split-dm-architecture-overview2 :name: split-dm-architecture-overview2
PCI Config space access in Post-launched VM PCI Config space access in the Post-launched VM
After we split pass through PCI(e) device from Device Model to ACRN Hypervisor, the After we split passthrough PCI(e) devices from the Device Model to the
whole picture is like this: ACRN Hypervisor, the whole picture looks like this:
.. figure:: images/split-dm-image3.png .. figure:: images/split-dm-image3.png
:align: center :align: center
@ -42,13 +43,13 @@ whole picture is like this:
:width: 900px :width: 900px
:name: split-dm-architecture-overview4 :name: split-dm-architecture-overview4
PCI Config space access in Post-launched VM PCI Config space access in the Post-launched VM
Interfaces Design Interfaces Design
================= =================
In order to achieve this, we add a new pair of hypercall to align the PCI(e) BAR In order to achieve this, we have added a new pair of hypercalls to align
and INTx information. the PCI(e) BAR and INTx information.
.. doxygenfunction:: hcall_assign_pcidev .. doxygenfunction:: hcall_assign_pcidev
:project: Project ACRN :project: Project ACRN