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hv:enable APICv-Posted Interrupt

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to enable APICv Posted interrupt supported, following the
 specifications defined in Intel SDM Section #29.6, Volume3.

 Posted-interrupt processing is a feature by which a processor
 processes the virtual interrupts by recording them as pending
 on the virtual-APIC page.

 Injecting interrupts to VCPU from remote CPU without causing
 VM exit on the destination, following steps in SDM Section 29.6,volume3:

Tracked-On: #1447
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Yonghua Huang
2018-10-09 19:50:58 +08:00
committed by Xie, Nanlin
parent a028567b9c
commit 38d5df723d
9 changed files with 80 additions and 4 deletions
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5
hypervisor/arch/x86/cpu.c
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@@ -483,6 +483,7 @@ static void bsp_boot_post(void)
timer_init();
setup_notification();
setup_posted_intr_notification();
ptdev_init();
init_scheduler();
@@ -860,6 +861,10 @@ bool is_apicv_intr_delivery_supported(void)
return ((cpu_caps.apicv_features & VAPIC_FEATURE_INTR_DELIVERY) != 0U);
}
bool is_apicv_posted_intr_supported(void)
{
return ((cpu_caps.apicv_features & VAPIC_FEATURE_POST_INTR) != 0U);
}
static void cpu_xsave_init(void)
{