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hv:enable APICv-Posted Interrupt

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to enable APICv Posted interrupt supported, following the
 specifications defined in Intel SDM Section #29.6, Volume3.

 Posted-interrupt processing is a feature by which a processor
 processes the virtual interrupts by recording them as pending
 on the virtual-APIC page.

 Injecting interrupts to VCPU from remote CPU without causing
 VM exit on the destination, following steps in SDM Section 29.6,volume3:

Tracked-On: #1447
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Yonghua Huang
2018-10-09 19:50:58 +08:00
committed by Xie, Nanlin
parent a028567b9c
commit 38d5df723d
9 changed files with 80 additions and 4 deletions
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3
hypervisor/include/arch/x86/vmx.h
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@@ -9,6 +9,7 @@
/* 16-bit control fields */
#define VMX_VPID 0x00000000U
#define VMX_POSTED_INTR_VECTOR 0x00000002U
/* 16-bit guest-state fields */
#define VMX_GUEST_ES_SEL 0x00000800U
#define VMX_GUEST_CS_SEL 0x00000802U
@@ -48,6 +49,8 @@
#define VMX_VIRTUAL_APIC_PAGE_ADDR_HIGH 0x00002013U
#define VMX_APIC_ACCESS_ADDR_FULL 0x00002014U
#define VMX_APIC_ACCESS_ADDR_HIGH 0x00002015U
#define VMX_PIR_DESC_ADDR_FULL 0x00002016U
#define VMX_PIR_DESC_ADDR_HIGH 0x00002017U
#define VMX_EPT_POINTER_FULL 0x0000201AU
#define VMX_EPT_POINTER_HIGH 0x0000201BU
#define VMX_EOI_EXIT0_FULL 0x0000201CU